Module core::arch::riscv32

source ·
🔬This is a nightly-only experimental API. (riscv_ext_intrinsics #114544)
Expand description

Platform-specific intrinsics for the riscv32 platform.

See the module documentation for more details.

Functions

  • add8Experimental
    Adds packed 8-bit signed numbers, discarding overflow bits
  • add16Experimental
    Adds packed 16-bit signed numbers, discarding overflow bits
  • aes32dsiExperimentalRISC-V RV32 and zknd
    AES final round decryption instruction for RV32.
  • aes32dsmiExperimentalRISC-V RV32 and zknd
    AES middle round decryption instruction for RV32.
  • aes32esiExperimentalRISC-V RV32 and zkne
    AES final round encryption instruction for RV32.
  • aes32esmiExperimentalRISC-V RV32 and zkne
    AES middle round encryption instruction for RV32 with.
  • clmulExperimentalzbc
    Carry-less multiply (low-part)
  • clmulhExperimentalzbc
    Carry-less multiply (high-part)
  • clmulrExperimentalzbc
    Carry-less multiply (reversed)
  • clrs8Experimental
    Count the number of redundant sign bits of the packed 8-bit elements
  • clrs16Experimental
    Count the number of redundant sign bits of the packed 16-bit elements
  • clrs32Experimental
    Count the number of redundant sign bits of the packed 32-bit elements
  • clz8Experimental
    Count the number of leading zero bits of the packed 8-bit elements
  • clz16Experimental
    Count the number of leading zero bits of the packed 16-bit elements
  • clz32Experimental
    Count the number of leading zero bits of the packed 32-bit elements
  • cmpeq8Experimental
    Compare equality for packed 8-bit elements
  • cmpeq16Experimental
    Compare equality for packed 16-bit elements
  • cras16Experimental
    Cross adds and subtracts packed 16-bit signed numbers, discarding overflow bits
  • crsa16Experimental
    Cross subtracts and adds packed 16-bit signed numbers, discarding overflow bits
  • fence_iExperimental
    Generates the FENCE.I instruction
  • frcsrExperimental
    Reads the floating-point control and status register fcsr
  • frflagsExperimental
    Reads the floating-point accrued exception flags register fflags
  • frrmExperimental
    Reads the floating-point rounding mode register frm
  • fscsrExperimental
    Swaps the floating-point control and status register fcsr
  • fsflagsExperimental
    Swaps the floating-point accrued exception flags register fflags
  • fsrmExperimental
    Swaps the floating-point rounding mode register frm
  • hfence_gvmaExperimental
    Hypervisor memory management fence for guest physical address and virtual machine
  • hfence_gvma_allExperimental
    Hypervisor memory management fence for all virtual machines and guest physical addresses
  • hfence_gvma_gaddrExperimental
    Hypervisor memory management fence for guest physical address
  • hfence_gvma_vmidExperimental
    Hypervisor memory management fence for given virtual machine
  • hfence_vvmaExperimental
    Hypervisor memory management fence for given guest virtual address and guest address space
  • hfence_vvma_allExperimental
    Hypervisor memory management fence for all guest address spaces and guest virtual addresses
  • hfence_vvma_asidExperimental
    Hypervisor memory management fence for given guest address space
  • hfence_vvma_vaddrExperimental
    Hypervisor memory management fence for given guest virtual address
  • hinval_gvmaExperimental
    Invalidate hypervisor translation cache for guest physical address and virtual machine
  • hinval_gvma_allExperimental
    Invalidate hypervisor translation cache for all virtual machines and guest physical addresses
  • hinval_gvma_gaddrExperimental
    Invalidate hypervisor translation cache for guest physical address
  • hinval_gvma_vmidExperimental
    Invalidate hypervisor translation cache for given virtual machine
  • hinval_vvmaExperimental
    Invalidate hypervisor translation cache for given guest virtual address and guest address space
  • hinval_vvma_allExperimental
    Invalidate hypervisor translation cache for all guest address spaces and guest virtual addresses
  • hinval_vvma_asidExperimental
    Invalidate hypervisor translation cache for given guest address space
  • hinval_vvma_vaddrExperimental
    Invalidate hypervisor translation cache for given guest virtual address
  • hlv_bExperimental
    Loads virtual machine memory by signed byte integer
  • hlv_buExperimental
    Loads virtual machine memory by unsigned byte integer
  • hlv_hExperimental
    Loads virtual machine memory by signed half integer
  • hlv_huExperimental
    Loads virtual machine memory by unsigned half integer
  • hlv_wExperimental
    Loads virtual machine memory by signed word integer
  • hlvx_huExperimental
    Accesses virtual machine instruction by unsigned half integer
  • hlvx_wuExperimental
    Accesses virtual machine instruction by unsigned word integer
  • hsv_bExperimental
    Stores virtual machine memory by byte integer
  • hsv_hExperimental
    Stores virtual machine memory by half integer
  • hsv_wExperimental
    Stores virtual machine memory by word integer
  • kabs8Experimental
    Compute the absolute value of packed 8-bit signed integers
  • kabs16Experimental
    Compute the absolute value of packed 16-bit signed integers
  • kadd8Experimental
    Adds packed 8-bit signed numbers, saturating at the numeric bounds
  • kadd16Experimental
    Adds packed 16-bit signed numbers, saturating at the numeric bounds
  • kaddhExperimental
    Adds signed lower 16-bit content of two registers with Q15 saturation
  • kcras16Experimental
    Cross adds and subtracts packed 16-bit signed numbers, saturating at the numeric bounds
  • kcrsa16Experimental
    Cross subtracts and adds packed 16-bit signed numbers, saturating at the numeric bounds
  • ksll8Experimental
    Logical left shift packed 8-bit elements, saturating at the numeric bounds
  • ksll16Experimental
    Logical left shift packed 16-bit elements, saturating at the numeric bounds
  • kslra8Experimental
    Logical saturating left then arithmetic right shift packed 8-bit elements
  • kslra8uExperimental
    Logical saturating left then arithmetic right shift packed 8-bit elements
  • kslra16Experimental
    Logical saturating left then arithmetic right shift packed 16-bit elements
  • kslra16uExperimental
    Logical saturating left then arithmetic right shift packed 16-bit elements
  • kstas16Experimental
    Straight adds and subtracts packed 16-bit signed numbers, saturating at the numeric bounds
  • kstsa16Experimental
    Straight subtracts and adds packed 16-bit signed numbers, saturating at the numeric bounds
  • ksub8Experimental
    Subtracts packed 8-bit signed numbers, saturating at the numeric bounds
  • ksub16Experimental
    Subtracts packed 16-bit signed numbers, saturating at the numeric bounds
  • ksubhExperimental
    Subtracts signed lower 16-bit content of two registers with Q15 saturation
  • nopExperimental
    Generates the NOP instruction
  • orc_bExperimentalzbb
    Bitwise OR-Combine, byte granule
  • pauseExperimental
    Generates the PAUSE instruction
  • pbsadExperimental
    Calculate the sum of absolute difference of unsigned 8-bit data elements
  • pbsadaExperimental
    Calculate and accumulate the sum of absolute difference of unsigned 8-bit data elements
  • pkbt16Experimental
    Pack two 16-bit data from bottom and top half from 32-bit chunks
  • pktb16Experimental
    Pack two 16-bit data from top and bottom half from 32-bit chunks
  • radd8Experimental
    Halves the sum of packed 8-bit signed numbers, dropping least bits
  • radd16Experimental
    Halves the sum of packed 16-bit signed numbers, dropping least bits
  • rcras16Experimental
    Cross halves of adds and subtracts packed 16-bit signed numbers, dropping least bits
  • rcrsa16Experimental
    Cross halves of subtracts and adds packed 16-bit signed numbers, dropping least bits
  • rstas16Experimental
    Straight halves of adds and subtracts packed 16-bit signed numbers, dropping least bits
  • rstsa16Experimental
    Straight halves of subtracts and adds packed 16-bit signed numbers, dropping least bits
  • rsub8Experimental
    Halves the subtraction result of packed 8-bit signed numbers, dropping least bits
  • rsub16Experimental
    Halves the subtraction result of packed 16-bit signed numbers, dropping least bits
  • scmple8Experimental
    Compare whether 8-bit packed signed integers are less than or equal to the others
  • scmple16Experimental
    Compare whether 16-bit packed signed integers are less than or equal to the others
  • scmplt8Experimental
    Compare whether 8-bit packed signed integers are less than the others
  • scmplt16Experimental
    Compare whether 16-bit packed signed integers are less than the others
  • sfence_inval_irExperimental
    Generates the SFENCE.INVAL.IR instruction
  • sfence_vmaExperimental
    Supervisor memory management fence for given virtual address and address space
  • sfence_vma_allExperimental
    Supervisor memory management fence for all address spaces and virtual addresses
  • sfence_vma_asidExperimental
    Supervisor memory management fence for given address space
  • sfence_vma_vaddrExperimental
    Supervisor memory management fence for given virtual address
  • sfence_w_invalExperimental
    Generates the SFENCE.W.INVAL instruction
  • sha256sig0Experimentalzknh
    Implements the Sigma0 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
  • sha256sig1Experimentalzknh
    Implements the Sigma1 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
  • sha256sum0Experimentalzknh
    Implements the Sum0 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
  • sha256sum1Experimentalzknh
    Implements the Sum1 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
  • sha512sig0hExperimentalRISC-V RV32 and zknh
    Implements the high half of the Sigma0 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
  • sha512sig0lExperimentalRISC-V RV32 and zknh
    Implements the low half of the Sigma0 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
  • sha512sig1hExperimentalRISC-V RV32 and zknh
    Implements the high half of the Sigma1 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
  • sha512sig1lExperimentalRISC-V RV32 and zknh
    Implements the low half of the Sigma1 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
  • sha512sum0rExperimentalRISC-V RV32 and zknh
    Implements the Sum0 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
  • sha512sum1rExperimentalRISC-V RV32 and zknh
    Implements the Sum1 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
  • sinval_vmaExperimental
    Invalidate supervisor translation cache for given virtual address and address space
  • sinval_vma_allExperimental
    Invalidate supervisor translation cache for all address spaces and virtual addresses
  • sinval_vma_asidExperimental
    Invalidate supervisor translation cache for given address space
  • sinval_vma_vaddrExperimental
    Invalidate supervisor translation cache for given virtual address
  • sll8Experimental
    Logical left shift packed 8-bit elements, discarding overflow bits
  • sll16Experimental
    Logical left shift packed 16-bit elements, discarding overflow bits
  • sm3p0Experimentalzksh
    Implements the P0 transformation function as used in the SM3 hash function [4, 30].
  • sm3p1Experimentalzksh
    Implements the P1 transformation function as used in the SM3 hash function [4, 30].
  • sm4edExperimentalzksed
    Accelerates the block encrypt/decrypt operation of the SM4 block cipher [5, 31].
  • sm4ksExperimentalzksed
    Accelerates the Key Schedule operation of the SM4 block cipher [5, 31] with bs=0.
  • smaqaExperimental
    Multiply signed 8-bit elements and add 16-bit elements on results for packed 32-bit chunks
  • smaqasuExperimental
    Multiply signed to unsigned 8-bit and add 16-bit elements on results for packed 32-bit chunks
  • smax8Experimental
    Get maximum values from 8-bit packed signed integers
  • smax16Experimental
    Get maximum values from 16-bit packed signed integers
  • smin8Experimental
    Get minimum values from 8-bit packed signed integers
  • smin16Experimental
    Get minimum values from 16-bit packed signed integers
  • sra8Experimental
    Arithmetic right shift packed 8-bit elements without rounding up
  • sra8uExperimental
    Arithmetic right shift packed 8-bit elements with rounding up
  • sra16Experimental
    Arithmetic right shift packed 16-bit elements without rounding up
  • sra16uExperimental
    Arithmetic right shift packed 16-bit elements with rounding up
  • srl8Experimental
    Logical right shift packed 8-bit elements without rounding up
  • srl8uExperimental
    Logical right shift packed 8-bit elements with rounding up
  • srl16Experimental
    Logical right shift packed 16-bit elements without rounding up
  • srl16uExperimental
    Logical right shift packed 16-bit elements with rounding up
  • stas16Experimental
    Straight adds and subtracts packed 16-bit signed numbers, discarding overflow bits
  • stsa16Experimental
    Straight subtracts and adds packed 16-bit signed numbers, discarding overflow bits
  • sub8Experimental
    Subtracts packed 8-bit signed numbers, discarding overflow bits
  • sub16Experimental
    Subtracts packed 16-bit signed numbers, discarding overflow bits
  • sunpkd810Experimental
    Unpack first and zeroth into two 16-bit signed halfwords in each 32-bit chunk
  • sunpkd820Experimental
    Unpack second and zeroth into two 16-bit signed halfwords in each 32-bit chunk
  • sunpkd830Experimental
    Unpack third and zeroth into two 16-bit signed halfwords in each 32-bit chunk
  • sunpkd831Experimental
    Unpack third and first into two 16-bit signed halfwords in each 32-bit chunk
  • sunpkd832Experimental
    Unpack third and second into two 16-bit signed halfwords in each 32-bit chunk
  • swap8Experimental
    Swap the 8-bit bytes within each 16-bit halfword of a register.
  • swap16Experimental
    Swap the 16-bit halfwords within each 32-bit word of a register
  • ucmple8Experimental
    Compare whether 8-bit packed unsigned integers are less than or equal to the others
  • ucmple16Experimental
    Compare whether 16-bit packed unsigned integers are less than or equal to the others
  • ucmplt8Experimental
    Compare whether 8-bit packed unsigned integers are less than the others
  • ucmplt16Experimental
    Compare whether 16-bit packed unsigned integers are less than the others
  • ukadd8Experimental
    Adds packed 8-bit unsigned numbers, saturating at the numeric bounds
  • ukadd16Experimental
    Adds packed 16-bit unsigned numbers, saturating at the numeric bounds
  • ukaddhExperimental
    Adds signed lower 16-bit content of two registers with U16 saturation
  • ukcras16Experimental
    Cross adds and subtracts packed 16-bit unsigned numbers, saturating at the numeric bounds
  • ukcrsa16Experimental
    Cross subtracts and adds packed 16-bit unsigned numbers, saturating at the numeric bounds
  • ukstas16Experimental
    Straight adds and subtracts packed 16-bit unsigned numbers, saturating at the numeric bounds
  • ukstsa16Experimental
    Straight subtracts and adds packed 16-bit unsigned numbers, saturating at the numeric bounds
  • uksub8Experimental
    Subtracts packed 8-bit unsigned numbers, saturating at the numeric bounds
  • uksub16Experimental
    Subtracts packed 16-bit unsigned numbers, saturating at the numeric bounds
  • uksubhExperimental
    Subtracts signed lower 16-bit content of two registers with U16 saturation
  • umaqaExperimental
    Multiply unsigned 8-bit elements and add 16-bit elements on results for packed 32-bit chunks
  • umax8Experimental
    Get maximum values from 8-bit packed unsigned integers
  • umax16Experimental
    Get maximum values from 16-bit packed unsigned integers
  • umin8Experimental
    Get minimum values from 8-bit packed unsigned integers
  • umin16Experimental
    Get minimum values from 16-bit packed unsigned integers
  • unzipExperimentalRISC-V RV32 and zbkb
    Place odd and even bits of the source word into upper/lower halves of the destination.
  • uradd8Experimental
    Halves the sum of packed 8-bit unsigned numbers, dropping least bits
  • uradd16Experimental
    Halves the sum of packed 16-bit unsigned numbers, dropping least bits
  • urcras16Experimental
    Cross halves of adds and subtracts packed 16-bit unsigned numbers, dropping least bits
  • urcrsa16Experimental
    Cross halves of subtracts and adds packed 16-bit unsigned numbers, dropping least bits
  • urstas16Experimental
    Straight halves of adds and subtracts packed 16-bit unsigned numbers, dropping least bits
  • urstsa16Experimental
    Straight halves of subtracts and adds packed 16-bit unsigned numbers, dropping least bits
  • ursub8Experimental
    Halves the subtraction result of packed 8-bit unsigned numbers, dropping least bits
  • ursub16Experimental
    Halves the subtraction result of packed 16-bit unsigned numbers, dropping least bits
  • wfiExperimental
    Generates the WFI instruction
  • xperm4Experimentalzbkx
    Nibble-wise lookup of indicies into a vector.
  • xperm8Experimentalzbkx
    Byte-wise lookup of indicies into a vector in registers.
  • zipExperimentalRISC-V RV32 and zbkb
    Place upper/lower halves of the source register into odd/even bits of the destination respectivley.
  • zunpkd810Experimental
    Unpack first and zeroth into two 16-bit unsigned halfwords in each 32-bit chunk
  • zunpkd820Experimental
    Unpack second and zeroth into two 16-bit unsigned halfwords in each 32-bit chunk
  • zunpkd830Experimental
    Unpack third and zeroth into two 16-bit unsigned halfwords in each 32-bit chunk
  • zunpkd831Experimental
    Unpack third and first into two 16-bit unsigned halfwords in each 32-bit chunk
  • zunpkd832Experimental
    Unpack third and second into two 16-bit unsigned halfwords in each 32-bit chunk