core::arch::riscv32

Function hinval_vvma_asid

source
pub unsafe fn hinval_vvma_asid(asid: usize)
🔬This is a nightly-only experimental API. (riscv_ext_intrinsics #114544)
Available on RISC-V RV32 only.
Expand description

Invalidate hypervisor translation cache for given guest address space

This instruction invalidates any address-translation cache entries that an HFENCE.VVMA instruction with the same values of vaddr and asid would invalidate.

This fence specifies a single guest address-space identifier.