Module core::arch::arm

source ·
🔬This is a nightly-only experimental API. (stdsimd #27731)
Available on ARM only.
Expand description

Platform-specific intrinsics for the arm platform.

See the module documentation for more details.

Modules

  • dspExperimental
    References:

Structs

  • APSRExperimental
    Application Program Status Register
  • SYExperimental
    Full system is the required shareability domain, reads and writes are the required access types
  • int8x4_tExperimental
    ARM-specific 32-bit wide vector of four packed i8.
  • int16x2_tExperimental
    ARM-specific 32-bit wide vector of two packed i16.
  • uint8x4_tExperimental
    ARM-specific 32-bit wide vector of four packed u8.
  • uint16x2_tExperimental
    ARM-specific 32-bit wide vector of two packed u16.
  • ARM-specific 64-bit wide vector of two packed f32.
  • ARM-specific type containing two float32x2_t vectors.
  • ARM-specific type containing three float32x2_t vectors.
  • ARM-specific type containing four float32x2_t vectors.
  • ARM-specific 128-bit wide vector of four packed f32.
  • ARM-specific type containing two float32x4_t vectors.
  • ARM-specific type containing three float32x4_t vectors.
  • ARM-specific type containing four float32x4_t vectors.
  • ARM-specific 64-bit wide vector of eight packed i8.
  • ARM-specific type containing two int8x8_t vectors.
  • ARM-specific type containing three int8x8_t vectors.
  • ARM-specific type containing four int8x8_t vectors.
  • ARM-specific 128-bit wide vector of sixteen packed i8.
  • ARM-specific type containing two int8x16_t vectors.
  • ARM-specific type containing three int8x16_t vectors.
  • ARM-specific type containing four int8x16_t vectors.
  • ARM-specific 64-bit wide vector of four packed i16.
  • ARM-specific type containing two int16x4_t vectors.
  • ARM-specific type containing three int16x4_t vectors.
  • ARM-specific type containing four int16x4_t vectors.
  • ARM-specific 128-bit wide vector of eight packed i16.
  • ARM-specific type containing two int16x8_t vectors.
  • ARM-specific type containing three int16x8_t vectors.
  • ARM-specific type containing four int16x8_t vectors.
  • ARM-specific 64-bit wide vector of two packed i32.
  • ARM-specific type containing two int32x2_t vectors.
  • ARM-specific type containing three int32x2_t vectors.
  • ARM-specific type containing four int32x2_t vectors.
  • ARM-specific 128-bit wide vector of four packed i32.
  • ARM-specific type containing two int32x4_t vectors.
  • ARM-specific type containing three int32x4_t vectors.
  • ARM-specific type containing four int32x4_t vectors.
  • ARM-specific 64-bit wide vector of one packed i64.
  • ARM-specific type containing four int64x1_t vectors.
  • ARM-specific type containing four int64x1_t vectors.
  • ARM-specific type containing four int64x1_t vectors.
  • ARM-specific 128-bit wide vector of two packed i64.
  • ARM-specific type containing four int64x2_t vectors.
  • ARM-specific type containing four int64x2_t vectors.
  • ARM-specific type containing four int64x2_t vectors.
  • ARM-specific 64-bit wide polynomial vector of eight packed p8.
  • ARM-specific type containing two poly8x8_t vectors.
  • ARM-specific type containing three poly8x8_t vectors.
  • ARM-specific type containing four poly8x8_t vectors.
  • ARM-specific 128-bit wide vector of sixteen packed p8.
  • ARM-specific type containing two poly8x16_t vectors.
  • ARM-specific type containing three poly8x16_t vectors.
  • ARM-specific type containing four poly8x16_t vectors.
  • ARM-specific 64-bit wide vector of four packed p16.
  • ARM-specific type containing two poly16x4_t vectors.
  • ARM-specific type containing three poly16x4_t vectors.
  • ARM-specific type containing four poly16x4_t vectors.
  • ARM-specific 128-bit wide vector of eight packed p16.
  • ARM-specific type containing two poly16x8_t vectors.
  • ARM-specific type containing three poly16x8_t vectors.
  • ARM-specific type containing four poly16x8_t vectors.
  • ARM-specific 64-bit wide vector of one packed p64.
  • ARM-specific type containing four poly64x1_t vectors.
  • ARM-specific type containing four poly64x1_t vectors.
  • ARM-specific type containing four poly64x1_t vectors.
  • ARM-specific 128-bit wide vector of two packed p64.
  • ARM-specific type containing four poly64x2_t vectors.
  • ARM-specific type containing four poly64x2_t vectors.
  • ARM-specific type containing four poly64x2_t vectors.
  • ARM-specific 64-bit wide vector of eight packed u8.
  • ARM-specific type containing two uint8x8_t vectors.
  • ARM-specific type containing three uint8x8_t vectors.
  • ARM-specific type containing four uint8x8_t vectors.
  • ARM-specific 128-bit wide vector of sixteen packed u8.
  • ARM-specific type containing two uint8x16_t vectors.
  • ARM-specific type containing three uint8x16_t vectors.
  • ARM-specific type containing four uint8x16_t vectors.
  • ARM-specific 64-bit wide vector of four packed u16.
  • ARM-specific type containing two uint16x4_t vectors.
  • ARM-specific type containing three uint16x4_t vectors.
  • ARM-specific type containing four uint16x4_t vectors.
  • ARM-specific 128-bit wide vector of eight packed u16.
  • ARM-specific type containing two uint16x8_t vectors.
  • ARM-specific type containing three uint16x8_t vectors.
  • ARM-specific type containing four uint16x8_t vectors.
  • ARM-specific 64-bit wide vector of two packed u32.
  • ARM-specific type containing two uint32x2_t vectors.
  • ARM-specific type containing three uint32x2_t vectors.
  • ARM-specific type containing four uint32x2_t vectors.
  • ARM-specific 128-bit wide vector of four packed u32.
  • ARM-specific type containing two uint32x4_t vectors.
  • ARM-specific type containing three uint32x4_t vectors.
  • ARM-specific type containing four uint32x4_t vectors.
  • ARM-specific 64-bit wide vector of one packed u64.
  • ARM-specific type containing four uint64x1_t vectors.
  • ARM-specific type containing four uint64x1_t vectors.
  • ARM-specific type containing four uint64x1_t vectors.
  • ARM-specific 128-bit wide vector of two packed u64.
  • ARM-specific type containing four uint64x2_t vectors.
  • ARM-specific type containing four uint64x2_t vectors.
  • ARM-specific type containing four uint64x2_t vectors.

Functions

  • __breakpointExperimental
    Inserts a breakpoint instruction.
  • __clrexExperimental
    Removes the exclusive lock created by LDREX
  • __crc32bExperimentalcrc
    CRC32 single round checksum for bytes (8 bits).
  • __crc32cbExperimentalcrc
    CRC32-C single round checksum for bytes (8 bits).
  • __crc32chExperimentalcrc
    CRC32-C single round checksum for half words (16 bits).
  • __crc32cwExperimentalcrc
    CRC32-C single round checksum for words (32 bits).
  • __crc32hExperimentalcrc
    CRC32 single round checksum for half words (16 bits).
  • __crc32wExperimentalcrc
    CRC32 single round checksum for words (32 bits).
  • __dbgExperimental
    Generates a DBG instruction.
  • __dmbExperimental
    Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.
  • __dsbExperimental
    Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.
  • __isbExperimental
    Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.
  • __ldrexExperimental
    Executes an exclusive LDR instruction for 32 bit value.
  • __ldrexbExperimental
    Executes an exclusive LDR instruction for 8 bit value.
  • __ldrexhExperimental
    Executes an exclusive LDR instruction for 16 bit value.
  • __nopExperimental
    Generates an unspecified no-op instruction.
  • __qaddExperimental
    Signed saturating addition
  • __qadd8Experimental
    Saturating four 8-bit integer additions
  • __qadd16Experimental
    Saturating two 16-bit integer additions
  • __qasxExperimental
    Returns the 16-bit signed saturated equivalent of
  • __qdblExperimental
    Insert a QADD instruction
  • __qsaxExperimental
    Returns the 16-bit signed saturated equivalent of
  • __qsubExperimental
    Signed saturating subtraction
  • __qsub8Experimental
    Saturating two 8-bit integer subtraction
  • __qsub16Experimental
    Saturating two 16-bit integer subtraction
  • __rsrExperimental
    Reads a 32-bit system register
  • __rsrpExperimental
    Reads a system register containing an address
  • __sadd8Experimental
    Returns the 8-bit signed saturated equivalent of
  • __sadd16Experimental
    Returns the 16-bit signed saturated equivalent of
  • __sasxExperimental
    Returns the 16-bit signed equivalent of
  • __selExperimental
    Select bytes from each operand according to APSR GE flags
  • __sevExperimental
    Generates a SEV (send a global event) hint instruction.
  • __sevlExperimental
    Generates a send a local event hint instruction.
  • __shadd8Experimental
    Signed halving parallel byte-wise addition.
  • __shadd16Experimental
    Signed halving parallel halfword-wise addition.
  • __shsub8Experimental
    Signed halving parallel byte-wise subtraction.
  • __shsub16Experimental
    Signed halving parallel halfword-wise subtraction.
  • __smlabbExperimental
    Insert a SMLABB instruction
  • __smlabtExperimental
    Insert a SMLABT instruction
  • __smladExperimental
    Dual 16-bit Signed Multiply with Addition of products and 32-bit accumulation.
  • __smlatbExperimental
    Insert a SMLATB instruction
  • __smlattExperimental
    Insert a SMLATT instruction
  • __smlawbExperimental
    Insert a SMLAWB instruction
  • __smlawtExperimental
    Insert a SMLAWT instruction
  • __smlsdExperimental
    Dual 16-bit Signed Multiply with Subtraction of products and 32-bit accumulation and overflow detection.
  • __smuadExperimental
    Signed Dual Multiply Add.
  • __smuadxExperimental
    Signed Dual Multiply Add Reversed.
  • __smulbbExperimental
    Insert a SMULBB instruction
  • __smulbtExperimental
    Insert a SMULTB instruction
  • __smultbExperimental
    Insert a SMULTB instruction
  • __smulttExperimental
    Insert a SMULTT instruction
  • __smulwbExperimental
    Insert a SMULWB instruction
  • __smulwtExperimental
    Insert a SMULWT instruction
  • __smusdExperimental
    Signed Dual Multiply Subtract.
  • __smusdxExperimental
    Signed Dual Multiply Subtract Reversed.
  • __ssub8Experimental
    Inserts a SSUB8 instruction.
  • __strexExperimental
    Executes an exclusive STR instruction for 32 bit values
  • __strexbExperimental
    Executes an exclusive STR instruction for 8 bit values
  • __usad8Experimental
    Sum of 8-bit absolute differences.
  • __usada8Experimental
    Sum of 8-bit absolute differences and constant.
  • __usub8Experimental
    Inserts a USUB8 instruction.
  • __wfeExperimental
    Generates a WFE (wait for event) hint instruction, or nothing.
  • __wfiExperimental
    Generates a WFI (wait for interrupt) hint instruction, or nothing.
  • __wsrExperimental
    Writes a 32-bit system register
  • __wsrpExperimental
    Writes a system register containing an address
  • __yieldExperimental
    Generates a YIELD hint instruction.
  • _clz_u8Experimental
    Count Leading Zeros.
  • _clz_u16Experimental
    Count Leading Zeros.
  • _clz_u32Experimental
    Count Leading Zeros.
  • _rbit_u32Experimental
    Reverse the bit order.
  • _rev_u16Experimental
    Reverse the order of the bytes.
  • _rev_u32Experimental
    Reverse the order of the bytes.
  • vaesdq_u8Experimentalaes
    AES single round decryption.
  • vaeseq_u8Experimentalaes
    AES single round encryption.
  • vaesimcq_u8Experimentalaes
    AES inverse mix columns.
  • vaesmcq_u8Experimentalaes
    AES mix columns.
  • vcombine_p64Experimentalneon
    Vector combine
  • vcombine_s8Experimentalneon
    Vector combine
  • vcombine_s16Experimentalneon
    Vector combine
  • vcombine_s32Experimentalneon
    Vector combine
  • vcombine_s64Experimentalneon
    Vector combine
  • vcombine_u8Experimentalneon
    Vector combine
  • vcombine_u16Experimentalneon
    Vector combine
  • vcombine_u32Experimentalneon
    Vector combine
  • vcombine_u64Experimentalneon
    Vector combine
  • vcvtq_s32_f32Experimentalneon and v7
    Floating-point Convert to Signed fixed-point, rounding toward Zero (vector)
  • vcvtq_u32_f32Experimentalneon and v7
    Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector)
  • vld1_f32Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_p8Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_p16Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_p64Experimentalneon,aes
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_s8Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_s16Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_s32Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_s64Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_u8Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_u16Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_u32Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1_u64Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_f32Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_p8Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_p16Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_p64Experimentalneon,aes
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_s8Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_s16Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_s32Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_s64Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_u8Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_u16Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_u32Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vld1q_u64Experimentalneon,v7
    Load multiple single-element structures to one, two, three, or four registers.
  • vmmlaq_s32Experimentali8mm and neon
    8-bit integer matrix multiply-accumulate
  • vmmlaq_u32Experimentali8mm and neon
    8-bit integer matrix multiply-accumulate
  • vsha1cq_u32Experimentalsha2
    SHA1 hash update accelerator, choose.
  • vsha1h_u32Experimentalsha2
    SHA1 fixed rotate.
  • vsha1mq_u32Experimentalsha2
    SHA1 hash update accelerator, majority.
  • vsha1pq_u32Experimentalsha2
    SHA1 hash update accelerator, parity.
  • vsha1su0q_u32Experimentalsha2
    SHA1 schedule update accelerator, first part.
  • vsha1su1q_u32Experimentalsha2
    SHA1 schedule update accelerator, second part.
  • vsha256h2q_u32Experimentalsha2
    SHA256 hash update accelerator, upper part.
  • vsha256hq_u32Experimentalsha2
    SHA256 hash update accelerator.
  • vsha256su0q_u32Experimentalsha2
    SHA256 schedule update accelerator, first part.
  • vsha256su1q_u32Experimentalsha2
    SHA256 schedule update accelerator, second part.
  • vsli_n_p8Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_p16Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_p64Experimentalneon,v7,aes
    Shift Left and Insert (immediate)
  • vsli_n_s8Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_s16Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_s32Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_s64Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_u8Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_u16Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_u32Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsli_n_u64Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_p8Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_p16Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_p64Experimentalneon,v7,aes
    Shift Left and Insert (immediate)
  • vsliq_n_s8Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_s16Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_s32Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_s64Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_u8Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_u16Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_u32Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsliq_n_u64Experimentalneon,v7
    Shift Left and Insert (immediate)
  • vsri_n_p8Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_p16Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_p64Experimentalneon,v7,aes
    Shift Right and Insert (immediate)
  • vsri_n_s8Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_s16Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_s32Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_s64Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_u8Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_u16Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_u32Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsri_n_u64Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_p8Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_p16Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_p64Experimentalneon,v7,aes
    Shift Right and Insert (immediate)
  • vsriq_n_s8Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_s16Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_s32Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_s64Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_u8Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_u16Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_u32Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vsriq_n_u64Experimentalneon,v7
    Shift Right and Insert (immediate)
  • vst1_f32Experimentalneon,v7
  • vst1_p8Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_p16Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_p64Experimentalneon,aes,v8
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_s8Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_s16Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_s32Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_s64Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_u8Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_u16Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_u32Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1_u64Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_f32Experimentalneon,v7
  • vst1q_p8Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_p16Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_p64Experimentalneon,aes,v8
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_s8Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_s16Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_s32Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_s64Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_u8Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_u16Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_u32Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vst1q_u64Experimentalneon,v7
    Store multiple single-element structures from one, two, three, or four registers.
  • vtbl1_p8Experimentalneon,v7
    Table look-up
  • vtbl1_s8Experimentalneon,v7
    Table look-up
  • vtbl1_u8Experimentalneon,v7
    Table look-up
  • vtbl2_p8Experimentalneon,v7
    Table look-up
  • vtbl2_s8Experimentalneon,v7
    Table look-up
  • vtbl2_u8Experimentalneon,v7
    Table look-up
  • vtbl3_p8Experimentalneon,v7
    Table look-up
  • vtbl3_s8Experimentalneon,v7
    Table look-up
  • vtbl3_u8Experimentalneon,v7
    Table look-up
  • vtbl4_p8Experimentalneon,v7
    Table look-up
  • vtbl4_s8Experimentalneon,v7
    Table look-up
  • vtbl4_u8Experimentalneon,v7
    Table look-up
  • vtbx1_p8Experimentalneon,v7
    Extended table look-up
  • vtbx1_s8Experimentalneon,v7
    Extended table look-up
  • vtbx1_u8Experimentalneon,v7
    Extended table look-up
  • vtbx2_p8Experimentalneon,v7
    Extended table look-up
  • vtbx2_s8Experimentalneon,v7
    Extended table look-up
  • vtbx2_u8Experimentalneon,v7
    Extended table look-up
  • vtbx3_p8Experimentalneon,v7
    Extended table look-up
  • vtbx3_s8Experimentalneon,v7
    Extended table look-up
  • vtbx3_u8Experimentalneon,v7
    Extended table look-up
  • vtbx4_p8Experimentalneon,v7
    Extended table look-up
  • vtbx4_s8Experimentalneon,v7
    Extended table look-up
  • vtbx4_u8Experimentalneon,v7
    Extended table look-up
  • vusmmlaq_s32Experimentali8mm and neon
    Unsigned and signed 8-bit integer matrix multiply-accumulate
  • vaba_s8neon
  • vaba_s16neon
  • vaba_s32neon
  • vaba_u8neon
  • vaba_u16neon
  • vaba_u32neon
  • vabal_s8neon
    Signed Absolute difference and Accumulate Long
  • vabal_s16neon
    Signed Absolute difference and Accumulate Long
  • vabal_s32neon
    Signed Absolute difference and Accumulate Long
  • vabal_u8neon
    Unsigned Absolute difference and Accumulate Long
  • vabal_u16neon
    Unsigned Absolute difference and Accumulate Long
  • vabal_u32neon
    Unsigned Absolute difference and Accumulate Long
  • vabaq_s8neon
  • vabaq_s16neon
  • vabaq_s32neon
  • vabaq_u8neon
  • vabaq_u16neon
  • vabaq_u32neon
  • vabd_f32neon
    Absolute difference between the arguments of Floating
  • vabd_s8neon
    Absolute difference between the arguments
  • vabd_s16neon
    Absolute difference between the arguments
  • vabd_s32neon
    Absolute difference between the arguments
  • vabd_u8neon
    Absolute difference between the arguments
  • vabd_u16neon
    Absolute difference between the arguments
  • vabd_u32neon
    Absolute difference between the arguments
  • vabdl_s8neon
    Signed Absolute difference Long
  • vabdl_s16neon
    Signed Absolute difference Long
  • vabdl_s32neon
    Signed Absolute difference Long
  • vabdl_u8neon
    Unsigned Absolute difference Long
  • vabdl_u16neon
    Unsigned Absolute difference Long
  • vabdl_u32neon
    Unsigned Absolute difference Long
  • vabdq_f32neon
    Absolute difference between the arguments of Floating
  • vabdq_s8neon
    Absolute difference between the arguments
  • vabdq_s16neon
    Absolute difference between the arguments
  • vabdq_s32neon
    Absolute difference between the arguments
  • vabdq_u8neon
    Absolute difference between the arguments
  • vabdq_u16neon
    Absolute difference between the arguments
  • vabdq_u32neon
    Absolute difference between the arguments
  • vabs_f32neon
    Floating-point absolute value
  • vabs_s8neon
    Absolute value (wrapping).
  • vabs_s16neon
    Absolute value (wrapping).
  • vabs_s32neon
    Absolute value (wrapping).
  • vabsq_f32neon
    Floating-point absolute value
  • vabsq_s8neon
    Absolute value (wrapping).
  • vabsq_s16neon
    Absolute value (wrapping).
  • vabsq_s32neon
    Absolute value (wrapping).
  • vadd_f32neon
    Vector add.
  • vadd_p8neon
    Bitwise exclusive OR
  • vadd_p16neon
    Bitwise exclusive OR
  • vadd_p64neon
    Bitwise exclusive OR
  • vadd_s8neon
    Vector add.
  • vadd_s16neon
    Vector add.
  • vadd_s32neon
    Vector add.
  • vadd_u8neon
    Vector add.
  • vadd_u16neon
    Vector add.
  • vadd_u32neon
    Vector add.
  • Add returning High Narrow (high half).
  • Add returning High Narrow (high half).
  • Add returning High Narrow (high half).
  • Add returning High Narrow (high half).
  • Add returning High Narrow (high half).
  • Add returning High Narrow (high half).
  • vaddhn_s16neon
    Add returning High Narrow.
  • vaddhn_s32neon
    Add returning High Narrow.
  • vaddhn_s64neon
    Add returning High Narrow.
  • vaddhn_u16neon
    Add returning High Narrow.
  • vaddhn_u32neon
    Add returning High Narrow.
  • vaddhn_u64neon
    Add returning High Narrow.
  • Signed Add Long (vector, high half).
  • Signed Add Long (vector, high half).
  • Signed Add Long (vector, high half).
  • Unsigned Add Long (vector, high half).
  • Unsigned Add Long (vector, high half).
  • Unsigned Add Long (vector, high half).
  • vaddl_s8neon
    Signed Add Long (vector).
  • vaddl_s16neon
    Signed Add Long (vector).
  • vaddl_s32neon
    Signed Add Long (vector).
  • vaddl_u8neon
    Unsigned Add Long (vector).
  • vaddl_u16neon
    Unsigned Add Long (vector).
  • vaddl_u32neon
    Unsigned Add Long (vector).
  • vaddq_f32neon
    Vector add.
  • vaddq_p8neon
    Bitwise exclusive OR
  • vaddq_p16neon
    Bitwise exclusive OR
  • vaddq_p64neon
    Bitwise exclusive OR
  • vaddq_p128neon
    Bitwise exclusive OR
  • vaddq_s8neon
    Vector add.
  • vaddq_s16neon
    Vector add.
  • vaddq_s32neon
    Vector add.
  • vaddq_s64neon
    Vector add.
  • vaddq_u8neon
    Vector add.
  • vaddq_u16neon
    Vector add.
  • vaddq_u32neon
    Vector add.
  • vaddq_u64neon
    Vector add.
  • Signed Add Wide (high half).
  • Signed Add Wide (high half).
  • Signed Add Wide (high half).
  • Unsigned Add Wide (high half).
  • Unsigned Add Wide (high half).
  • Unsigned Add Wide (high half).
  • vaddw_s8neon
    Signed Add Wide.
  • vaddw_s16neon
    Signed Add Wide.
  • vaddw_s32neon
    Signed Add Wide.
  • vaddw_u8neon
    Unsigned Add Wide.
  • vaddw_u16neon
    Unsigned Add Wide.
  • vaddw_u32neon
    Unsigned Add Wide.
  • vand_s8neon
    Vector bitwise and
  • vand_s16neon
    Vector bitwise and
  • vand_s32neon
    Vector bitwise and
  • vand_s64neon
    Vector bitwise and
  • vand_u8neon
    Vector bitwise and
  • vand_u16neon
    Vector bitwise and
  • vand_u32neon
    Vector bitwise and
  • vand_u64neon
    Vector bitwise and
  • vandq_s8neon
    Vector bitwise and
  • vandq_s16neon
    Vector bitwise and
  • vandq_s32neon
    Vector bitwise and
  • vandq_s64neon
    Vector bitwise and
  • vandq_u8neon
    Vector bitwise and
  • vandq_u16neon
    Vector bitwise and
  • vandq_u32neon
    Vector bitwise and
  • vandq_u64neon
    Vector bitwise and
  • vbic_s8neon
    Vector bitwise bit clear
  • vbic_s16neon
    Vector bitwise bit clear
  • vbic_s32neon
    Vector bitwise bit clear
  • vbic_s64neon
    Vector bitwise bit clear
  • vbic_u8neon
    Vector bitwise bit clear
  • vbic_u16neon
    Vector bitwise bit clear
  • vbic_u32neon
    Vector bitwise bit clear
  • vbic_u64neon
    Vector bitwise bit clear
  • vbicq_s8neon
    Vector bitwise bit clear
  • vbicq_s16neon
    Vector bitwise bit clear
  • vbicq_s32neon
    Vector bitwise bit clear
  • vbicq_s64neon
    Vector bitwise bit clear
  • vbicq_u8neon
    Vector bitwise bit clear
  • vbicq_u16neon
    Vector bitwise bit clear
  • vbicq_u32neon
    Vector bitwise bit clear
  • vbicq_u64neon
    Vector bitwise bit clear
  • vbsl_f32neon
    Bitwise Select.
  • vbsl_p8neon
    Bitwise Select.
  • vbsl_p16neon
    Bitwise Select.
  • vbsl_s8neon
    Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register to the corresponding bit from the first source SIMD&FP register when the original destination bit was 1, otherwise from the second source SIMD&FP register. Bitwise Select.
  • vbsl_s16neon
    Bitwise Select.
  • vbsl_s32neon
    Bitwise Select.
  • vbsl_s64neon
    Bitwise Select.
  • vbsl_u8neon
    Bitwise Select.
  • vbsl_u16neon
    Bitwise Select.
  • vbsl_u32neon
    Bitwise Select.
  • vbsl_u64neon
    Bitwise Select.
  • vbslq_f32neon
    Bitwise Select. (128-bit)
  • vbslq_p8neon
    Bitwise Select. (128-bit)
  • vbslq_p16neon
    Bitwise Select. (128-bit)
  • vbslq_s8neon
    Bitwise Select. (128-bit)
  • vbslq_s16neon
    Bitwise Select. (128-bit)
  • vbslq_s32neon
    Bitwise Select. (128-bit)
  • vbslq_s64neon
    Bitwise Select. (128-bit)
  • vbslq_u8neon
    Bitwise Select. (128-bit)
  • vbslq_u16neon
    Bitwise Select. (128-bit)
  • vbslq_u32neon
    Bitwise Select. (128-bit)
  • vbslq_u64neon
    Bitwise Select. (128-bit)
  • vcage_f32neon
    Floating-point absolute compare greater than or equal
  • vcageq_f32neon
    Floating-point absolute compare greater than or equal
  • vcagt_f32neon
    Floating-point absolute compare greater than
  • vcagtq_f32neon
    Floating-point absolute compare greater than
  • vcale_f32neon
    Floating-point absolute compare less than or equal
  • vcaleq_f32neon
    Floating-point absolute compare less than or equal
  • vcalt_f32neon
    Floating-point absolute compare less than
  • vcaltq_f32neon
    Floating-point absolute compare less than
  • vceq_f32neon
    Floating-point compare equal
  • vceq_p8neon
    Compare bitwise Equal (vector)
  • vceq_s8neon
    Compare bitwise Equal (vector)
  • vceq_s16neon
    Compare bitwise Equal (vector)
  • vceq_s32neon
    Compare bitwise Equal (vector)
  • vceq_u8neon
    Compare bitwise Equal (vector)
  • vceq_u16neon
    Compare bitwise Equal (vector)
  • vceq_u32neon
    Compare bitwise Equal (vector)
  • vceqq_f32neon
    Floating-point compare equal
  • vceqq_p8neon
    Compare bitwise Equal (vector)
  • vceqq_s8neon
    Compare bitwise Equal (vector)
  • vceqq_s16neon
    Compare bitwise Equal (vector)
  • vceqq_s32neon
    Compare bitwise Equal (vector)
  • vceqq_u8neon
    Compare bitwise Equal (vector)
  • vceqq_u16neon
    Compare bitwise Equal (vector)
  • vceqq_u32neon
    Compare bitwise Equal (vector)
  • vcge_f32neon
    Floating-point compare greater than or equal
  • vcge_s8neon
    Compare signed greater than or equal
  • vcge_s16neon
    Compare signed greater than or equal
  • vcge_s32neon
    Compare signed greater than or equal
  • vcge_u8neon
    Compare unsigned greater than or equal
  • vcge_u16neon
    Compare unsigned greater than or equal
  • vcge_u32neon
    Compare unsigned greater than or equal
  • vcgeq_f32neon
    Floating-point compare greater than or equal
  • vcgeq_s8neon
    Compare signed greater than or equal
  • vcgeq_s16neon
    Compare signed greater than or equal
  • vcgeq_s32neon
    Compare signed greater than or equal
  • vcgeq_u8neon
    Compare unsigned greater than or equal
  • vcgeq_u16neon
    Compare unsigned greater than or equal
  • vcgeq_u32neon
    Compare unsigned greater than or equal
  • vcgt_f32neon
    Floating-point compare greater than
  • vcgt_s8neon
    Compare signed greater than
  • vcgt_s16neon
    Compare signed greater than
  • vcgt_s32neon
    Compare signed greater than
  • vcgt_u8neon
    Compare unsigned highe
  • vcgt_u16neon
    Compare unsigned highe
  • vcgt_u32neon
    Compare unsigned highe
  • vcgtq_f32neon
    Floating-point compare greater than
  • vcgtq_s8neon
    Compare signed greater than
  • vcgtq_s16neon
    Compare signed greater than
  • vcgtq_s32neon
    Compare signed greater than
  • vcgtq_u8neon
    Compare unsigned highe
  • vcgtq_u16neon
    Compare unsigned highe
  • vcgtq_u32neon
    Compare unsigned highe
  • vcle_f32neon
    Floating-point compare less than or equal
  • vcle_s8neon
    Compare signed less than or equal
  • vcle_s16neon
    Compare signed less than or equal
  • vcle_s32neon
    Compare signed less than or equal
  • vcle_u8neon
    Compare unsigned less than or equal
  • vcle_u16neon
    Compare unsigned less than or equal
  • vcle_u32neon
    Compare unsigned less than or equal
  • vcleq_f32neon
    Floating-point compare less than or equal
  • vcleq_s8neon
    Compare signed less than or equal
  • vcleq_s16neon
    Compare signed less than or equal
  • vcleq_s32neon
    Compare signed less than or equal
  • vcleq_u8neon
    Compare unsigned less than or equal
  • vcleq_u16neon
    Compare unsigned less than or equal
  • vcleq_u32neon
    Compare unsigned less than or equal
  • vcls_s8neon
    Count leading sign bits
  • vcls_s16neon
    Count leading sign bits
  • vcls_s32neon
    Count leading sign bits
  • vcls_u8neon
    Count leading sign bits
  • vcls_u16neon
    Count leading sign bits
  • vcls_u32neon
    Count leading sign bits
  • vclsq_s8neon
    Count leading sign bits
  • vclsq_s16neon
    Count leading sign bits
  • vclsq_s32neon
    Count leading sign bits
  • vclsq_u8neon
    Count leading sign bits
  • vclsq_u16neon
    Count leading sign bits
  • vclsq_u32neon
    Count leading sign bits
  • vclt_f32neon
    Floating-point compare less than
  • vclt_s8neon
    Compare signed less than
  • vclt_s16neon
    Compare signed less than
  • vclt_s32neon
    Compare signed less than
  • vclt_u8neon
    Compare unsigned less than
  • vclt_u16neon
    Compare unsigned less than
  • vclt_u32neon
    Compare unsigned less than
  • vcltq_f32neon
    Floating-point compare less than
  • vcltq_s8neon
    Compare signed less than
  • vcltq_s16neon
    Compare signed less than
  • vcltq_s32neon
    Compare signed less than
  • vcltq_u8neon
    Compare unsigned less than
  • vcltq_u16neon
    Compare unsigned less than
  • vcltq_u32neon
    Compare unsigned less than
  • vclz_s8neon
    Count leading zero bits
  • vclz_s16neon
    Count leading zero bits
  • vclz_s32neon
    Count leading zero bits
  • vclz_u8neon
    Count leading zero bits
  • vclz_u16neon
    Count leading zero bits
  • vclz_u32neon
    Count leading zero bits
  • vclzq_s8neon
    Count leading zero bits
  • vclzq_s16neon
    Count leading zero bits
  • vclzq_s32neon
    Count leading zero bits
  • vclzq_u8neon
    Count leading zero bits
  • vclzq_u16neon
    Count leading zero bits
  • vclzq_u32neon
    Count leading zero bits
  • vcnt_p8neon
    Population count per byte.
  • vcnt_s8neon
    Population count per byte.
  • vcnt_u8neon
    Population count per byte.
  • vcntq_p8neon
    Population count per byte.
  • vcntq_s8neon
    Population count per byte.
  • vcntq_u8neon
    Population count per byte.
  • Vector combine
  • Vector combine
  • Vector combine
  • Insert vector element from another vector element
  • vcreate_p8neon
    Insert vector element from another vector element
  • Insert vector element from another vector element
  • vcreate_p64neon,aes
    Insert vector element from another vector element
  • vcreate_s8neon
    Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • vcreate_u8neon
    Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Fixed-point convert to floating-point
  • Fixed-point convert to floating-point
  • Floating-point convert to signed fixed-point, rounding toward zero
  • Floating-point convert to unsigned fixed-point, rounding toward zero
  • Fixed-point convert to floating-point
  • Fixed-point convert to floating-point
  • Floating-point convert to signed fixed-point, rounding toward zero
  • Floating-point convert to unsigned fixed-point, rounding toward zero
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • vdup_n_f32neon
    Duplicate vector element to vector or scalar
  • vdup_n_p8neon
    Duplicate vector element to vector or scalar
  • vdup_n_p16neon
    Duplicate vector element to vector or scalar
  • vdup_n_s8neon
    Duplicate vector element to vector or scalar
  • vdup_n_s16neon
    Duplicate vector element to vector or scalar
  • vdup_n_s32neon
    Duplicate vector element to vector or scalar
  • vdup_n_s64neon
    Duplicate vector element to vector or scalar
  • vdup_n_u8neon
    Duplicate vector element to vector or scalar
  • vdup_n_u16neon
    Duplicate vector element to vector or scalar
  • vdup_n_u32neon
    Duplicate vector element to vector or scalar
  • vdup_n_u64neon
    Duplicate vector element to vector or scalar
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Set all vector lanes to the same value
  • Duplicate vector element to vector or scalar
  • vdupq_n_p8neon
    Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • vdupq_n_s8neon
    Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • vdupq_n_u8neon
    Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • veor_s8neon
    Vector bitwise exclusive or (vector)
  • veor_s16neon
    Vector bitwise exclusive or (vector)
  • veor_s32neon
    Vector bitwise exclusive or (vector)
  • veor_s64neon
    Vector bitwise exclusive or (vector)
  • veor_u8neon
    Vector bitwise exclusive or (vector)
  • veor_u16neon
    Vector bitwise exclusive or (vector)
  • veor_u32neon
    Vector bitwise exclusive or (vector)
  • veor_u64neon
    Vector bitwise exclusive or (vector)
  • veorq_s8neon
    Vector bitwise exclusive or (vector)
  • veorq_s16neon
    Vector bitwise exclusive or (vector)
  • veorq_s32neon
    Vector bitwise exclusive or (vector)
  • veorq_s64neon
    Vector bitwise exclusive or (vector)
  • veorq_u8neon
    Vector bitwise exclusive or (vector)
  • veorq_u16neon
    Vector bitwise exclusive or (vector)
  • veorq_u32neon
    Vector bitwise exclusive or (vector)
  • veorq_u64neon
    Vector bitwise exclusive or (vector)
  • vext_f32neon
    Extract vector from pair of vectors
  • vext_p8neon
    Extract vector from pair of vectors
  • vext_p16neon
    Extract vector from pair of vectors
  • vext_s8neon
    Extract vector from pair of vectors
  • vext_s16neon
    Extract vector from pair of vectors
  • vext_s32neon
    Extract vector from pair of vectors
  • vext_s64neon
    Extract vector from pair of vectors
  • vext_u8neon
    Extract vector from pair of vectors
  • vext_u16neon
    Extract vector from pair of vectors
  • vext_u32neon
    Extract vector from pair of vectors
  • vext_u64neon
    Extract vector from pair of vectors
  • vextq_f32neon
    Extract vector from pair of vectors
  • vextq_p8neon
    Extract vector from pair of vectors
  • vextq_p16neon
    Extract vector from pair of vectors
  • vextq_s8neon
    Extract vector from pair of vectors
  • vextq_s16neon
    Extract vector from pair of vectors
  • vextq_s32neon
    Extract vector from pair of vectors
  • vextq_s64neon
    Extract vector from pair of vectors
  • vextq_u8neon
    Extract vector from pair of vectors
  • vextq_u16neon
    Extract vector from pair of vectors
  • vextq_u32neon
    Extract vector from pair of vectors
  • vextq_u64neon
    Extract vector from pair of vectors
  • vfma_f32neon
    Floating-point fused Multiply-Add to accumulator(vector)
  • vfma_n_f32neon
    Floating-point fused Multiply-Add to accumulator(vector)
  • vfmaq_f32neon
    Floating-point fused Multiply-Add to accumulator(vector)
  • Floating-point fused Multiply-Add to accumulator(vector)
  • vfms_f32neon
    Floating-point fused multiply-subtract from accumulator
  • vfms_n_f32neon
    Floating-point fused Multiply-subtract to accumulator(vector)
  • vfmsq_f32neon
    Floating-point fused multiply-subtract from accumulator
  • Floating-point fused Multiply-subtract to accumulator(vector)
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • Move vector element to general-purpose register
  • vhadd_s8neon
    Halving add
  • vhadd_s16neon
    Halving add
  • vhadd_s32neon
    Halving add
  • vhadd_u8neon
    Halving add
  • vhadd_u16neon
    Halving add
  • vhadd_u32neon
    Halving add
  • vhaddq_s8neon
    Halving add
  • vhaddq_s16neon
    Halving add
  • vhaddq_s32neon
    Halving add
  • vhaddq_u8neon
    Halving add
  • vhaddq_u16neon
    Halving add
  • vhaddq_u32neon
    Halving add
  • vhsub_s8neon
    Signed halving subtract
  • vhsub_s16neon
    Signed halving subtract
  • vhsub_s32neon
    Signed halving subtract
  • vhsub_u8neon
    Signed halving subtract
  • vhsub_u16neon
    Signed halving subtract
  • vhsub_u32neon
    Signed halving subtract
  • vhsubq_s8neon
    Signed halving subtract
  • vhsubq_s16neon
    Signed halving subtract
  • vhsubq_s32neon
    Signed halving subtract
  • vhsubq_u8neon
    Signed halving subtract
  • vhsubq_u16neon
    Signed halving subtract
  • vhsubq_u32neon
    Signed halving subtract
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • vld1_dup_p64neon,aes
    Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • vld1_lane_p64neon,aes
    Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • vld1_p8_x2neon
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_p8_x3neon
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_p8_x4neon
    Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • vld1_p64_x2neon,aes
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_p64_x3neon,aes
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_p64_x4neon,aes
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_s8_x2neon
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_s8_x3neon
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_s8_x4neon
    Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • vld1_u8_x2neon
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_u8_x3neon
    Load multiple single-element structures to one, two, three, or four registers
  • vld1_u8_x4neon
    Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • vld1q_dup_p64neon,aes
    Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load one single-element structure and Replicate to all lanes (of one register).
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • vld1q_lane_p64neon,aes
    Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load one single-element structure to one lane of one register.
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • vld1q_p64_x2neon,aes
    Load multiple single-element structures to one, two, three, or four registers
  • vld1q_p64_x3neon,aes
    Load multiple single-element structures to one, two, three, or four registers
  • vld1q_p64_x4neon,aes
    Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load multiple single-element structures to one, two, three, or four registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • vld2_dup_p64neon,aes
    Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load multiple 2-element structures to two registers
  • Load multiple 2-element structures to two registers
  • Load multiple 2-element structures to two registers
  • Load multiple 2-element structures to two registers
  • Load multiple 2-element structures to two registers
  • vld2_p8neon
    Load multiple 2-element structures to two registers
  • vld2_p16neon
    Load multiple 2-element structures to two registers
  • vld2_p64neon,aes
    Load multiple 2-element structures to two registers
  • vld2_u8neon
    Load multiple 2-element structures to two registers
  • vld2_u16neon
    Load multiple 2-element structures to two registers
  • vld2_u32neon
    Load multiple 2-element structures to two registers
  • vld2_u64neon
    Load multiple 2-element structures to two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load single 2-element structure and replicate to all lanes of two registers
  • Load multiple 2-element structures to two registers
  • Load multiple 2-element structures to two registers
  • Load multiple 2-element structures to two registers
  • vld2q_p8neon
    Load multiple 2-element structures to two registers
  • vld2q_p16neon
    Load multiple 2-element structures to two registers
  • vld2q_u8neon
    Load multiple 2-element structures to two registers
  • vld2q_u16neon
    Load multiple 2-element structures to two registers
  • vld2q_u32neon
    Load multiple 2-element structures to two registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • vld3_dup_p64neon,aes
    Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load multiple 3-element structures to three registers
  • Load multiple 3-element structures to three registers
  • Load multiple 3-element structures to three registers
  • Load multiple 3-element structures to three registers
  • Load multiple 3-element structures to three registers
  • vld3_p8neon
    Load multiple 3-element structures to three registers
  • vld3_p16neon
    Load multiple 3-element structures to three registers
  • vld3_p64neon,aes
    Load multiple 3-element structures to three registers
  • vld3_u8neon
    Load multiple 3-element structures to three registers
  • vld3_u16neon
    Load multiple 3-element structures to three registers
  • vld3_u32neon
    Load multiple 3-element structures to three registers
  • vld3_u64neon
    Load multiple 3-element structures to three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load single 3-element structure and replicate to all lanes of three registers
  • Load multiple 3-element structures to three registers
  • Load multiple 3-element structures to three registers
  • Load multiple 3-element structures to three registers
  • vld3q_p8neon
    Load multiple 3-element structures to three registers
  • vld3q_p16neon
    Load multiple 3-element structures to three registers
  • vld3q_u8neon
    Load multiple 3-element structures to three registers
  • vld3q_u16neon
    Load multiple 3-element structures to three registers
  • vld3q_u32neon
    Load multiple 3-element structures to three registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • vld4_dup_p64neon,aes
    Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load multiple 4-element structures to four registers
  • Load multiple 4-element structures to four registers
  • Load multiple 4-element structures to four registers
  • Load multiple 4-element structures to four registers
  • Load multiple 4-element structures to four registers
  • vld4_p8neon
    Load multiple 4-element structures to four registers
  • vld4_p16neon
    Load multiple 4-element structures to four registers
  • vld4_p64neon,aes
    Load multiple 4-element structures to four registers
  • vld4_u8neon
    Load multiple 4-element structures to four registers
  • vld4_u16neon
    Load multiple 4-element structures to four registers
  • vld4_u32neon
    Load multiple 4-element structures to four registers
  • vld4_u64neon
    Load multiple 4-element structures to four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load single 4-element structure and replicate to all lanes of four registers
  • Load multiple 4-element structures to four registers
  • Load multiple 4-element structures to four registers
  • Load multiple 4-element structures to four registers
  • vld4q_p8neon
    Load multiple 4-element structures to four registers
  • vld4q_p16neon
    Load multiple 4-element structures to four registers
  • vld4q_u8neon
    Load multiple 4-element structures to four registers
  • vld4q_u16neon
    Load multiple 4-element structures to four registers
  • vld4q_u32neon
    Load multiple 4-element structures to four registers
  • vldrq_p128neon
    Load SIMD&FP register (immediate offset)
  • vmax_f32neon
    Maximum (vector)
  • vmax_s8neon
    Maximum (vector)
  • vmax_s16neon
    Maximum (vector)
  • vmax_s32neon
    Maximum (vector)
  • vmax_u8neon
    Maximum (vector)
  • vmax_u16neon
    Maximum (vector)
  • vmax_u32neon
    Maximum (vector)
  • vmaxnm_f32neon
    Floating-point Maximum Number (vector)
  • Floating-point Maximum Number (vector)
  • vmaxq_f32neon
    Maximum (vector)
  • vmaxq_s8neon
    Maximum (vector)
  • vmaxq_s16neon
    Maximum (vector)
  • vmaxq_s32neon
    Maximum (vector)
  • vmaxq_u8neon
    Maximum (vector)
  • vmaxq_u16neon
    Maximum (vector)
  • vmaxq_u32neon
    Maximum (vector)
  • vmin_f32neon
    Minimum (vector)
  • vmin_s8neon
    Minimum (vector)
  • vmin_s16neon
    Minimum (vector)
  • vmin_s32neon
    Minimum (vector)
  • vmin_u8neon
    Minimum (vector)
  • vmin_u16neon
    Minimum (vector)
  • vmin_u32neon
    Minimum (vector)
  • vminnm_f32neon
    Floating-point Minimum Number (vector)
  • Floating-point Minimum Number (vector)
  • vminq_f32neon
    Minimum (vector)
  • vminq_s8neon
    Minimum (vector)
  • vminq_s16neon
    Minimum (vector)
  • vminq_s32neon
    Minimum (vector)
  • vminq_u8neon
    Minimum (vector)
  • vminq_u16neon
    Minimum (vector)
  • vminq_u32neon
    Minimum (vector)
  • vmla_f32neon
    Floating-point multiply-add to accumulator
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • vmla_n_f32neon
    Vector multiply accumulate with scalar
  • vmla_n_s16neon
    Vector multiply accumulate with scalar
  • vmla_n_s32neon
    Vector multiply accumulate with scalar
  • vmla_n_u16neon
    Vector multiply accumulate with scalar
  • vmla_n_u32neon
    Vector multiply accumulate with scalar
  • vmla_s8neon
    Multiply-add to accumulator
  • vmla_s16neon
    Multiply-add to accumulator
  • vmla_s32neon
    Multiply-add to accumulator
  • vmla_u8neon
    Multiply-add to accumulator
  • vmla_u16neon
    Multiply-add to accumulator
  • vmla_u32neon
    Multiply-add to accumulator
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • Vector widening multiply accumulate with scalar
  • vmlal_s8neon
    Signed multiply-add long
  • vmlal_s16neon
    Signed multiply-add long
  • vmlal_s32neon
    Signed multiply-add long
  • vmlal_u8neon
    Unsigned multiply-add long
  • vmlal_u16neon
    Unsigned multiply-add long
  • vmlal_u32neon
    Unsigned multiply-add long
  • vmlaq_f32neon
    Floating-point multiply-add to accumulator
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • Vector multiply accumulate with scalar
  • vmlaq_s8neon
    Multiply-add to accumulator
  • vmlaq_s16neon
    Multiply-add to accumulator
  • vmlaq_s32neon
    Multiply-add to accumulator
  • vmlaq_u8neon
    Multiply-add to accumulator
  • vmlaq_u16neon
    Multiply-add to accumulator
  • vmlaq_u32neon
    Multiply-add to accumulator
  • vmls_f32neon
    Floating-point multiply-subtract from accumulator
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • vmls_n_f32neon
    Vector multiply subtract with scalar
  • vmls_n_s16neon
    Vector multiply subtract with scalar
  • vmls_n_s32neon
    Vector multiply subtract with scalar
  • vmls_n_u16neon
    Vector multiply subtract with scalar
  • vmls_n_u32neon
    Vector multiply subtract with scalar
  • vmls_s8neon
    Multiply-subtract from accumulator
  • vmls_s16neon
    Multiply-subtract from accumulator
  • vmls_s32neon
    Multiply-subtract from accumulator
  • vmls_u8neon
    Multiply-subtract from accumulator
  • vmls_u16neon
    Multiply-subtract from accumulator
  • vmls_u32neon
    Multiply-subtract from accumulator
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • Vector widening multiply subtract with scalar
  • vmlsl_s8neon
    Signed multiply-subtract long
  • vmlsl_s16neon
    Signed multiply-subtract long
  • vmlsl_s32neon
    Signed multiply-subtract long
  • vmlsl_u8neon
    Unsigned multiply-subtract long
  • vmlsl_u16neon
    Unsigned multiply-subtract long
  • vmlsl_u32neon
    Unsigned multiply-subtract long
  • vmlsq_f32neon
    Floating-point multiply-subtract from accumulator
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • Vector multiply subtract with scalar
  • vmlsq_s8neon
    Multiply-subtract from accumulator
  • vmlsq_s16neon
    Multiply-subtract from accumulator
  • vmlsq_s32neon
    Multiply-subtract from accumulator
  • vmlsq_u8neon
    Multiply-subtract from accumulator
  • vmlsq_u16neon
    Multiply-subtract from accumulator
  • vmlsq_u32neon
    Multiply-subtract from accumulator
  • vmov_n_f32neon
    Duplicate vector element to vector or scalar
  • vmov_n_p8neon
    Duplicate vector element to vector or scalar
  • vmov_n_p16neon
    Duplicate vector element to vector or scalar
  • vmov_n_s8neon
    Duplicate vector element to vector or scalar
  • vmov_n_s16neon
    Duplicate vector element to vector or scalar
  • vmov_n_s32neon
    Duplicate vector element to vector or scalar
  • vmov_n_s64neon
    Duplicate vector element to vector or scalar
  • vmov_n_u8neon
    Duplicate vector element to vector or scalar
  • vmov_n_u16neon
    Duplicate vector element to vector or scalar
  • vmov_n_u32neon
    Duplicate vector element to vector or scalar
  • vmov_n_u64neon
    Duplicate vector element to vector or scalar
  • vmovl_s8neon
    Vector long move.
  • vmovl_s16neon
    Vector long move.
  • vmovl_s32neon
    Vector long move.
  • vmovl_u8neon
    Vector long move.
  • vmovl_u16neon
    Vector long move.
  • vmovl_u32neon
    Vector long move.
  • vmovn_s16neon
    Vector narrow integer.
  • vmovn_s32neon
    Vector narrow integer.
  • vmovn_s64neon
    Vector narrow integer.
  • vmovn_u16neon
    Vector narrow integer.
  • vmovn_u32neon
    Vector narrow integer.
  • vmovn_u64neon
    Vector narrow integer.
  • Duplicate vector element to vector or scalar
  • vmovq_n_p8neon
    Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • vmovq_n_s8neon
    Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • vmovq_n_u8neon
    Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • Duplicate vector element to vector or scalar
  • vmul_f32neon
    Multiply
  • Floating-point multiply
  • Multiply
  • Multiply
  • Multiply
  • Multiply
  • Floating-point multiply
  • Multiply
  • Multiply
  • Multiply
  • Multiply
  • vmul_n_f32neon
    Vector multiply by scalar
  • vmul_n_s16neon
    Vector multiply by scalar
  • vmul_n_s32neon
    Vector multiply by scalar
  • vmul_n_u16neon
    Vector multiply by scalar
  • vmul_n_u32neon
    Vector multiply by scalar
  • vmul_p8neon
    Polynomial multiply
  • vmul_s8neon
    Multiply
  • vmul_s16neon
    Multiply
  • vmul_s32neon
    Multiply
  • vmul_u8neon
    Multiply
  • vmul_u16neon
    Multiply
  • vmul_u32neon
    Multiply
  • Vector long multiply by scalar
  • Vector long multiply by scalar
  • Vector long multiply by scalar
  • Vector long multiply by scalar
  • Vector long multiply by scalar
  • Vector long multiply by scalar
  • Vector long multiply by scalar
  • Vector long multiply by scalar
  • Vector long multiply with scalar
  • Vector long multiply with scalar
  • Vector long multiply with scalar
  • Vector long multiply with scalar
  • vmull_p8neon
    Polynomial multiply long
  • vmull_s8neon
    Signed multiply long
  • vmull_s16neon
    Signed multiply long
  • vmull_s32neon
    Signed multiply long
  • vmull_u8neon
    Unsigned multiply long
  • vmull_u16neon
    Unsigned multiply long
  • vmull_u32neon
    Unsigned multiply long
  • vmulq_f32neon
    Multiply
  • Floating-point multiply
  • Multiply
  • Multiply
  • Multiply
  • Multiply
  • Floating-point multiply
  • Multiply
  • Multiply
  • Multiply
  • Multiply
  • Vector multiply by scalar
  • Vector multiply by scalar
  • Vector multiply by scalar
  • Vector multiply by scalar
  • Vector multiply by scalar
  • vmulq_p8neon
    Polynomial multiply
  • vmulq_s8neon
    Multiply
  • vmulq_s16neon
    Multiply
  • vmulq_s32neon
    Multiply
  • vmulq_u8neon
    Multiply
  • vmulq_u16neon
    Multiply
  • vmulq_u32neon
    Multiply
  • vmvn_p8neon
    Vector bitwise not.
  • vmvn_s8neon
    Vector bitwise not.
  • vmvn_s16neon
    Vector bitwise not.
  • vmvn_s32neon
    Vector bitwise not.
  • vmvn_u8neon
    Vector bitwise not.
  • vmvn_u16neon
    Vector bitwise not.
  • vmvn_u32neon
    Vector bitwise not.
  • vmvnq_p8neon
    Vector bitwise not.
  • vmvnq_s8neon
    Vector bitwise not.
  • vmvnq_s16neon
    Vector bitwise not.
  • vmvnq_s32neon
    Vector bitwise not.
  • vmvnq_u8neon
    Vector bitwise not.
  • vmvnq_u16neon
    Vector bitwise not.
  • vmvnq_u32neon
    Vector bitwise not.
  • vneg_f32neon
    Negate
  • vneg_s8neon
    Negate
  • vneg_s16neon
    Negate
  • vneg_s32neon
    Negate
  • vnegq_f32neon
    Negate
  • vnegq_s8neon
    Negate
  • vnegq_s16neon
    Negate
  • vnegq_s32neon
    Negate
  • vorn_s8neon
    Vector bitwise inclusive OR NOT
  • vorn_s16neon
    Vector bitwise inclusive OR NOT
  • vorn_s32neon
    Vector bitwise inclusive OR NOT
  • vorn_s64neon
    Vector bitwise inclusive OR NOT
  • vorn_u8neon
    Vector bitwise inclusive OR NOT
  • vorn_u16neon
    Vector bitwise inclusive OR NOT
  • vorn_u32neon
    Vector bitwise inclusive OR NOT
  • vorn_u64neon
    Vector bitwise inclusive OR NOT
  • vornq_s8neon
    Vector bitwise inclusive OR NOT
  • vornq_s16neon
    Vector bitwise inclusive OR NOT
  • vornq_s32neon
    Vector bitwise inclusive OR NOT
  • vornq_s64neon
    Vector bitwise inclusive OR NOT
  • vornq_u8neon
    Vector bitwise inclusive OR NOT
  • vornq_u16neon
    Vector bitwise inclusive OR NOT
  • vornq_u32neon
    Vector bitwise inclusive OR NOT
  • vornq_u64neon
    Vector bitwise inclusive OR NOT
  • vorr_s8neon
    Vector bitwise or (immediate, inclusive)
  • vorr_s16neon
    Vector bitwise or (immediate, inclusive)
  • vorr_s32neon
    Vector bitwise or (immediate, inclusive)
  • vorr_s64neon
    Vector bitwise or (immediate, inclusive)
  • vorr_u8neon
    Vector bitwise or (immediate, inclusive)
  • vorr_u16neon
    Vector bitwise or (immediate, inclusive)
  • vorr_u32neon
    Vector bitwise or (immediate, inclusive)
  • vorr_u64neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_s8neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_s16neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_s32neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_s64neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_u8neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_u16neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_u32neon
    Vector bitwise or (immediate, inclusive)
  • vorrq_u64neon
    Vector bitwise or (immediate, inclusive)
  • vpadal_s8neon
    Signed Add and Accumulate Long Pairwise.
  • vpadal_s16neon
    Signed Add and Accumulate Long Pairwise.
  • vpadal_s32neon
    Signed Add and Accumulate Long Pairwise.
  • vpadal_u8neon
    Unsigned Add and Accumulate Long Pairwise.
  • vpadal_u16neon
    Unsigned Add and Accumulate Long Pairwise.
  • vpadal_u32neon
    Unsigned Add and Accumulate Long Pairwise.
  • vpadalq_s8neon
    Signed Add and Accumulate Long Pairwise.
  • Signed Add and Accumulate Long Pairwise.
  • Signed Add and Accumulate Long Pairwise.
  • vpadalq_u8neon
    Unsigned Add and Accumulate Long Pairwise.
  • Unsigned Add and Accumulate Long Pairwise.
  • Unsigned Add and Accumulate Long Pairwise.
  • vpadd_f32neon
    Floating-point add pairwise
  • vpadd_s8neon
    Add pairwise.
  • vpadd_s16neon
    Add pairwise.
  • vpadd_s32neon
    Add pairwise.
  • vpadd_u8neon
    Add pairwise.
  • vpadd_u16neon
    Add pairwise.
  • vpadd_u32neon
    Add pairwise.
  • vpaddl_s8neon
    Signed Add Long Pairwise.
  • vpaddl_s16neon
    Signed Add Long Pairwise.
  • vpaddl_s32neon
    Signed Add Long Pairwise.
  • vpaddl_u8neon
    Unsigned Add Long Pairwise.
  • vpaddl_u16neon
    Unsigned Add Long Pairwise.
  • vpaddl_u32neon
    Unsigned Add Long Pairwise.
  • vpaddlq_s8neon
    Signed Add Long Pairwise.
  • Signed Add Long Pairwise.
  • Signed Add Long Pairwise.
  • vpaddlq_u8neon
    Unsigned Add Long Pairwise.
  • Unsigned Add Long Pairwise.
  • Unsigned Add Long Pairwise.
  • vpmax_f32neon
    Folding maximum of adjacent pairs
  • vpmax_s8neon
    Folding maximum of adjacent pairs
  • vpmax_s16neon
    Folding maximum of adjacent pairs
  • vpmax_s32neon
    Folding maximum of adjacent pairs
  • vpmax_u8neon
    Folding maximum of adjacent pairs
  • vpmax_u16neon
    Folding maximum of adjacent pairs
  • vpmax_u32neon
    Folding maximum of adjacent pairs
  • vpmin_f32neon
    Folding minimum of adjacent pairs
  • vpmin_s8neon
    Folding minimum of adjacent pairs
  • vpmin_s16neon
    Folding minimum of adjacent pairs
  • vpmin_s32neon
    Folding minimum of adjacent pairs
  • vpmin_u8neon
    Folding minimum of adjacent pairs
  • vpmin_u16neon
    Folding minimum of adjacent pairs
  • vpmin_u32neon
    Folding minimum of adjacent pairs
  • vqabs_s8neon
    Signed saturating Absolute value
  • vqabs_s16neon
    Signed saturating Absolute value
  • vqabs_s32neon
    Signed saturating Absolute value
  • vqabsq_s8neon
    Signed saturating Absolute value
  • vqabsq_s16neon
    Signed saturating Absolute value
  • vqabsq_s32neon
    Signed saturating Absolute value
  • vqadd_s8neon
    Saturating add
  • vqadd_s16neon
    Saturating add
  • vqadd_s32neon
    Saturating add
  • vqadd_s64neon
    Saturating add
  • vqadd_u8neon
    Saturating add
  • vqadd_u16neon
    Saturating add
  • vqadd_u32neon
    Saturating add
  • vqadd_u64neon
    Saturating add
  • vqaddq_s8neon
    Saturating add
  • vqaddq_s16neon
    Saturating add
  • vqaddq_s32neon
    Saturating add
  • vqaddq_s64neon
    Saturating add
  • vqaddq_u8neon
    Saturating add
  • vqaddq_u16neon
    Saturating add
  • vqaddq_u32neon
    Saturating add
  • vqaddq_u64neon
    Saturating add
  • Vector widening saturating doubling multiply accumulate with scalar
  • Vector widening saturating doubling multiply accumulate with scalar
  • Vector widening saturating doubling multiply accumulate with scalar
  • Vector widening saturating doubling multiply accumulate with scalar
  • Signed saturating doubling multiply-add long
  • Signed saturating doubling multiply-add long
  • Vector widening saturating doubling multiply subtract with scalar
  • Vector widening saturating doubling multiply subtract with scalar
  • Vector widening saturating doubling multiply subtract with scalar
  • Vector widening saturating doubling multiply subtract with scalar
  • Signed saturating doubling multiply-subtract long
  • Signed saturating doubling multiply-subtract long
  • Vector saturating doubling multiply high by scalar
  • Vector saturating doubling multiply high by scalar
  • Vector saturating doubling multiply high with scalar
  • Vector saturating doubling multiply high with scalar
  • Signed saturating doubling multiply returning high half
  • Signed saturating doubling multiply returning high half
  • Vector saturating doubling multiply high by scalar
  • Vector saturating doubling multiply high by scalar
  • Vector saturating doubling multiply high with scalar
  • Vector saturating doubling multiply high with scalar
  • Signed saturating doubling multiply returning high half
  • Signed saturating doubling multiply returning high half
  • Vector saturating doubling long multiply by scalar
  • Vector saturating doubling long multiply by scalar
  • Vector saturating doubling long multiply with scalar
  • Vector saturating doubling long multiply with scalar
  • Signed saturating doubling multiply long
  • Signed saturating doubling multiply long
  • vqmovn_s16neon
    Signed saturating extract narrow
  • vqmovn_s32neon
    Signed saturating extract narrow
  • vqmovn_s64neon
    Signed saturating extract narrow
  • vqmovn_u16neon
    Unsigned saturating extract narrow
  • vqmovn_u32neon
    Unsigned saturating extract narrow
  • vqmovn_u64neon
    Unsigned saturating extract narrow
  • Signed saturating extract unsigned narrow
  • Signed saturating extract unsigned narrow
  • Signed saturating extract unsigned narrow
  • vqneg_s8neon
    Signed saturating negate
  • vqneg_s16neon
    Signed saturating negate
  • vqneg_s32neon
    Signed saturating negate
  • vqnegq_s8neon
    Signed saturating negate
  • vqnegq_s16neon
    Signed saturating negate
  • vqnegq_s32neon
    Signed saturating negate
  • Vector rounding saturating doubling multiply high by scalar
  • Vector rounding saturating doubling multiply high by scalar
  • Vector rounding saturating doubling multiply high by scalar
  • Vector rounding saturating doubling multiply high by scalar
  • Vector saturating rounding doubling multiply high with scalar
  • Vector saturating rounding doubling multiply high with scalar
  • Signed saturating rounding doubling multiply returning high half
  • Signed saturating rounding doubling multiply returning high half
  • Vector rounding saturating doubling multiply high by scalar
  • Vector rounding saturating doubling multiply high by scalar
  • Vector rounding saturating doubling multiply high by scalar
  • Vector rounding saturating doubling multiply high by scalar
  • Vector saturating rounding doubling multiply high with scalar
  • Vector saturating rounding doubling multiply high with scalar
  • Signed saturating rounding doubling multiply returning high half
  • Signed saturating rounding doubling multiply returning high half
  • vqrshl_s8neon
    Signed saturating rounding shift left
  • vqrshl_s16neon
    Signed saturating rounding shift left
  • vqrshl_s32neon
    Signed saturating rounding shift left
  • vqrshl_s64neon
    Signed saturating rounding shift left
  • vqrshl_u8neon
    Unsigned signed saturating rounding shift left
  • vqrshl_u16neon
    Unsigned signed saturating rounding shift left
  • vqrshl_u32neon
    Unsigned signed saturating rounding shift left
  • vqrshl_u64neon
    Unsigned signed saturating rounding shift left
  • vqrshlq_s8neon
    Signed saturating rounding shift left
  • Signed saturating rounding shift left
  • Signed saturating rounding shift left
  • Signed saturating rounding shift left
  • vqrshlq_u8neon
    Unsigned signed saturating rounding shift left
  • Unsigned signed saturating rounding shift left
  • Unsigned signed saturating rounding shift left
  • Unsigned signed saturating rounding shift left
  • vqshl_n_s8neon
    Signed saturating shift left
  • Signed saturating shift left
  • Signed saturating shift left
  • Signed saturating shift left
  • vqshl_n_u8neon
    Unsigned saturating shift left
  • Unsigned saturating shift left
  • Unsigned saturating shift left
  • Unsigned saturating shift left
  • vqshl_s8neon
    Signed saturating shift left
  • vqshl_s16neon
    Signed saturating shift left
  • vqshl_s32neon
    Signed saturating shift left
  • vqshl_s64neon
    Signed saturating shift left
  • vqshl_u8neon
    Unsigned saturating shift left
  • vqshl_u16neon
    Unsigned saturating shift left
  • vqshl_u32neon
    Unsigned saturating shift left
  • vqshl_u64neon
    Unsigned saturating shift left
  • Signed saturating shift left
  • Signed saturating shift left
  • Signed saturating shift left
  • Signed saturating shift left
  • Unsigned saturating shift left
  • Unsigned saturating shift left
  • Unsigned saturating shift left
  • Unsigned saturating shift left
  • vqshlq_s8neon
    Signed saturating shift left
  • vqshlq_s16neon
    Signed saturating shift left
  • vqshlq_s32neon
    Signed saturating shift left
  • vqshlq_s64neon
    Signed saturating shift left
  • vqshlq_u8neon
    Unsigned saturating shift left
  • vqshlq_u16neon
    Unsigned saturating shift left
  • vqshlq_u32neon
    Unsigned saturating shift left
  • vqshlq_u64neon
    Unsigned saturating shift left
  • vqsub_s8neon
    Saturating subtract
  • vqsub_s16neon
    Saturating subtract
  • vqsub_s32neon
    Saturating subtract
  • vqsub_s64neon
    Saturating subtract
  • vqsub_u8neon
    Saturating subtract
  • vqsub_u16neon
    Saturating subtract
  • vqsub_u32neon
    Saturating subtract
  • vqsub_u64neon
    Saturating subtract
  • vqsubq_s8neon
    Saturating subtract
  • vqsubq_s16neon
    Saturating subtract
  • vqsubq_s32neon
    Saturating subtract
  • vqsubq_s64neon
    Saturating subtract
  • vqsubq_u8neon
    Saturating subtract
  • vqsubq_u16neon
    Saturating subtract
  • vqsubq_u32neon
    Saturating subtract
  • vqsubq_u64neon
    Saturating subtract
  • Rounding Add returning High Narrow (high half).
  • Rounding Add returning High Narrow (high half).
  • Rounding Add returning High Narrow (high half).
  • Rounding Add returning High Narrow (high half).
  • Rounding Add returning High Narrow (high half).
  • Rounding Add returning High Narrow (high half).
  • Rounding Add returning High Narrow.
  • Rounding Add returning High Narrow.
  • Rounding Add returning High Narrow.
  • Rounding Add returning High Narrow.
  • Rounding Add returning High Narrow.
  • Rounding Add returning High Narrow.
  • vrecpe_f32neon
    Reciprocal estimate.
  • vrecpe_u32neon
    Unsigned reciprocal estimate
  • Reciprocal estimate.
  • Unsigned reciprocal estimate
  • vrecps_f32neon
    Floating-point reciprocal step
  • Floating-point reciprocal step
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • Vector reinterpret cast operation
  • vrev16_p8neon
    Reversing vector elements (swap endianness)
  • vrev16_s8neon
    Reversing vector elements (swap endianness)
  • vrev16_u8neon
    Reversing vector elements (swap endianness)
  • vrev16q_p8neon
    Reversing vector elements (swap endianness)
  • vrev16q_s8neon
    Reversing vector elements (swap endianness)
  • vrev16q_u8neon
    Reversing vector elements (swap endianness)
  • vrev32_p8neon
    Reversing vector elements (swap endianness)
  • vrev32_p16neon
    Reversing vector elements (swap endianness)
  • vrev32_s8neon
    Reversing vector elements (swap endianness)
  • vrev32_s16neon
    Reversing vector elements (swap endianness)
  • vrev32_u8neon
    Reversing vector elements (swap endianness)
  • vrev32_u16neon
    Reversing vector elements (swap endianness)
  • vrev32q_p8neon
    Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • vrev32q_s8neon
    Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • vrev32q_u8neon
    Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • vrev64_f32neon
    Reversing vector elements (swap endianness)
  • vrev64_p8neon
    Reversing vector elements (swap endianness)
  • vrev64_p16neon
    Reversing vector elements (swap endianness)
  • vrev64_s8neon
    Reversing vector elements (swap endianness)
  • vrev64_s16neon
    Reversing vector elements (swap endianness)
  • vrev64_s32neon
    Reversing vector elements (swap endianness)
  • vrev64_u8neon
    Reversing vector elements (swap endianness)
  • vrev64_u16neon
    Reversing vector elements (swap endianness)
  • vrev64_u32neon
    Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • vrev64q_p8neon
    Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • vrev64q_s8neon
    Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • vrev64q_u8neon
    Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • Reversing vector elements (swap endianness)
  • vrhadd_s8neon
    Rounding halving add
  • vrhadd_s16neon
    Rounding halving add
  • vrhadd_s32neon
    Rounding halving add
  • vrhadd_u8neon
    Rounding halving add
  • vrhadd_u16neon
    Rounding halving add
  • vrhadd_u32neon
    Rounding halving add
  • vrhaddq_s8neon
    Rounding halving add
  • Rounding halving add
  • Rounding halving add
  • vrhaddq_u8neon
    Rounding halving add
  • Rounding halving add
  • Rounding halving add
  • vrndn_f32neon
    Floating-point round to integral, to nearest with ties to even
  • vrndnq_f32neon
    Floating-point round to integral, to nearest with ties to even
  • vrshl_s8neon
    Signed rounding shift left
  • vrshl_s16neon
    Signed rounding shift left
  • vrshl_s32neon
    Signed rounding shift left
  • vrshl_s64neon
    Signed rounding shift left
  • vrshl_u8neon
    Unsigned rounding shift left
  • vrshl_u16neon
    Unsigned rounding shift left
  • vrshl_u32neon
    Unsigned rounding shift left
  • vrshl_u64neon
    Unsigned rounding shift left
  • vrshlq_s8neon
    Signed rounding shift left
  • vrshlq_s16neon
    Signed rounding shift left
  • vrshlq_s32neon
    Signed rounding shift left
  • vrshlq_s64neon
    Signed rounding shift left
  • vrshlq_u8neon
    Unsigned rounding shift left
  • vrshlq_u16neon
    Unsigned rounding shift left
  • vrshlq_u32neon
    Unsigned rounding shift left
  • vrshlq_u64neon
    Unsigned rounding shift left
  • vrshr_n_s8neon
    Signed rounding shift right
  • Signed rounding shift right
  • Signed rounding shift right
  • Signed rounding shift right
  • vrshr_n_u8neon
    Unsigned rounding shift right
  • Unsigned rounding shift right
  • Unsigned rounding shift right
  • Unsigned rounding shift right
  • Rounding shift right narrow
  • Rounding shift right narrow
  • Rounding shift right narrow
  • Signed rounding shift right
  • Signed rounding shift right
  • Signed rounding shift right
  • Signed rounding shift right
  • Unsigned rounding shift right
  • Unsigned rounding shift right
  • Unsigned rounding shift right
  • Unsigned rounding shift right
  • Reciprocal square-root estimate.
  • Unsigned reciprocal square root estimate
  • Reciprocal square-root estimate.
  • Unsigned reciprocal square root estimate
  • Floating-point reciprocal square root step
  • Floating-point reciprocal square root step
  • vrsra_n_s8neon
    Signed rounding shift right and accumulate
  • Signed rounding shift right and accumulate
  • Signed rounding shift right and accumulate
  • Signed rounding shift right and accumulate
  • vrsra_n_u8neon
    Unsigned rounding shift right and accumulate
  • Unsigned rounding shift right and accumulate
  • Unsigned rounding shift right and accumulate
  • Unsigned rounding shift right and accumulate
  • Signed rounding shift right and accumulate
  • Signed rounding shift right and accumulate
  • Signed rounding shift right and accumulate
  • Signed rounding shift right and accumulate
  • Unsigned rounding shift right and accumulate
  • Unsigned rounding shift right and accumulate
  • Unsigned rounding shift right and accumulate
  • Unsigned rounding shift right and accumulate
  • Rounding subtract returning high narrow
  • Rounding subtract returning high narrow
  • Rounding subtract returning high narrow
  • Rounding subtract returning high narrow
  • Rounding subtract returning high narrow
  • Rounding subtract returning high narrow
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • vset_lane_p64neon,aes
    Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • vsetq_lane_p64neon,aes
    Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • Insert vector element from another vector element
  • vshl_n_s8neon
    Shift left
  • vshl_n_s16neon
    Shift left
  • vshl_n_s32neon
    Shift left
  • vshl_n_s64neon
    Shift left
  • vshl_n_u8neon
    Shift left
  • vshl_n_u16neon
    Shift left
  • vshl_n_u32neon
    Shift left
  • vshl_n_u64neon
    Shift left
  • vshl_s8neon
    Signed Shift left
  • vshl_s16neon
    Signed Shift left
  • vshl_s32neon
    Signed Shift left
  • vshl_s64neon
    Signed Shift left
  • vshl_u8neon
    Unsigned Shift left
  • vshl_u16neon
    Unsigned Shift left
  • vshl_u32neon
    Unsigned Shift left
  • vshl_u64neon
    Unsigned Shift left
  • vshll_n_s8neon
    Signed shift left long
  • Signed shift left long
  • Signed shift left long
  • vshll_n_u8neon
    Signed shift left long
  • Signed shift left long
  • Signed shift left long
  • vshlq_n_s8neon
    Shift left
  • Shift left
  • Shift left
  • Shift left
  • vshlq_n_u8neon
    Shift left
  • Shift left
  • Shift left
  • Shift left
  • vshlq_s8neon
    Signed Shift left
  • vshlq_s16neon
    Signed Shift left
  • vshlq_s32neon
    Signed Shift left
  • vshlq_s64neon
    Signed Shift left
  • vshlq_u8neon
    Unsigned Shift left
  • vshlq_u16neon
    Unsigned Shift left
  • vshlq_u32neon
    Unsigned Shift left
  • vshlq_u64neon
    Unsigned Shift left
  • vshr_n_s8neon
    Shift right
  • vshr_n_s16neon
    Shift right
  • vshr_n_s32neon
    Shift right
  • vshr_n_s64neon
    Shift right
  • vshr_n_u8neon
    Shift right
  • vshr_n_u16neon
    Shift right
  • vshr_n_u32neon
    Shift right
  • vshr_n_u64neon
    Shift right
  • Shift right narrow
  • Shift right narrow
  • Shift right narrow
  • Shift right narrow
  • Shift right narrow
  • Shift right narrow
  • vshrq_n_s8neon
    Shift right
  • Shift right
  • Shift right
  • Shift right
  • vshrq_n_u8neon
    Shift right
  • Shift right
  • Shift right
  • Shift right
  • vsra_n_s8neon
    Signed shift right and accumulate
  • vsra_n_s16neon
    Signed shift right and accumulate
  • vsra_n_s32neon
    Signed shift right and accumulate
  • vsra_n_s64neon
    Signed shift right and accumulate
  • vsra_n_u8neon
    Unsigned shift right and accumulate
  • vsra_n_u16neon
    Unsigned shift right and accumulate
  • vsra_n_u32neon
    Unsigned shift right and accumulate
  • vsra_n_u64neon
    Unsigned shift right and accumulate
  • vsraq_n_s8neon
    Signed shift right and accumulate
  • Signed shift right and accumulate
  • Signed shift right and accumulate
  • Signed shift right and accumulate
  • vsraq_n_u8neon
    Unsigned shift right and accumulate
  • Unsigned shift right and accumulate
  • Unsigned shift right and accumulate
  • Unsigned shift right and accumulate
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • vst1_lane_p64neon,aes
    Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • vst1_p8_x2neon
    Store multiple single-element structures to one, two, three, or four registers
  • vst1_p8_x3neon
    Store multiple single-element structures to one, two, three, or four registers
  • vst1_p8_x4neon
    Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • vst1_p64_x2neon,aes
    Store multiple single-element structures to one, two, three, or four registers
  • vst1_p64_x3neon,aes
    Store multiple single-element structures to one, two, three, or four registers
  • vst1_p64_x4neon,aes
    Store multiple single-element structures to one, two, three, or four registers
  • vst1_u8_x2neon
    Store multiple single-element structures to one, two, three, or four registers
  • vst1_u8_x3neon
    Store multiple single-element structures to one, two, three, or four registers
  • vst1_u8_x4neon
    Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • vst1q_lane_p64neon,aes
    Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures from one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • vst1q_p64_x2neon,aes
    Store multiple single-element structures to one, two, three, or four registers
  • vst1q_p64_x3neon,aes
    Store multiple single-element structures to one, two, three, or four registers
  • vst1q_p64_x4neon,aes
    Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple single-element structures to one, two, three, or four registers
  • Store multiple 2-element structures from two registers
  • Store multiple 2-element structures from two registers
  • Store multiple 2-element structures from two registers
  • Store multiple 2-element structures from two registers
  • Store multiple 2-element structures from two registers
  • vst2_p8neon
    Store multiple 2-element structures from two registers
  • vst2_p16neon
    Store multiple 2-element structures from two registers
  • vst2_p64neon,aes
    Store multiple 2-element structures from two registers
  • vst2_u8neon
    Store multiple 2-element structures from two registers
  • vst2_u16neon
    Store multiple 2-element structures from two registers
  • vst2_u32neon
    Store multiple 2-element structures from two registers
  • vst2_u64neon
    Store multiple 2-element structures from two registers
  • Store multiple 2-element structures from two registers
  • Store multiple 2-element structures from two registers
  • Store multiple 2-element structures from two registers
  • vst2q_p8neon
    Store multiple 2-element structures from two registers
  • vst2q_p16neon
    Store multiple 2-element structures from two registers
  • vst2q_u8neon
    Store multiple 2-element structures from two registers
  • vst2q_u16neon
    Store multiple 2-element structures from two registers
  • vst2q_u32neon
    Store multiple 2-element structures from two registers
  • Store multiple 3-element structures from three registers
  • Store multiple 3-element structures from three registers
  • Store multiple 3-element structures from three registers
  • Store multiple 3-element structures from three registers
  • Store multiple 3-element structures from three registers
  • vst3_p8neon
    Store multiple 3-element structures from three registers
  • vst3_p16neon
    Store multiple 3-element structures from three registers
  • vst3_p64neon,aes
    Store multiple 3-element structures from three registers
  • vst3_u8neon
    Store multiple 3-element structures from three registers
  • vst3_u16neon
    Store multiple 3-element structures from three registers
  • vst3_u32neon
    Store multiple 3-element structures from three registers
  • vst3_u64neon
    Store multiple 3-element structures from three registers
  • Store multiple 3-element structures from three registers
  • Store multiple 3-element structures from three registers
  • Store multiple 3-element structures from three registers
  • vst3q_p8neon
    Store multiple 3-element structures from three registers
  • vst3q_p16neon
    Store multiple 3-element structures from three registers
  • vst3q_u8neon
    Store multiple 3-element structures from three registers
  • vst3q_u16neon
    Store multiple 3-element structures from three registers
  • vst3q_u32neon
    Store multiple 3-element structures from three registers
  • Store multiple 4-element structures from four registers
  • Store multiple 4-element structures from four registers
  • Store multiple 4-element structures from four registers
  • Store multiple 4-element structures from four registers
  • Store multiple 4-element structures from four registers
  • vst4_p8neon
    Store multiple 4-element structures from four registers
  • vst4_p16neon
    Store multiple 4-element structures from four registers
  • vst4_p64neon,aes
    Store multiple 4-element structures from four registers
  • vst4_u8neon
    Store multiple 4-element structures from four registers
  • vst4_u16neon
    Store multiple 4-element structures from four registers
  • vst4_u32neon
    Store multiple 4-element structures from four registers
  • vst4_u64neon
    Store multiple 4-element structures from four registers
  • Store multiple 4-element structures from four registers
  • Store multiple 4-element structures from four registers
  • Store multiple 4-element structures from four registers
  • vst4q_p8neon
    Store multiple 4-element structures from four registers
  • vst4q_p16neon
    Store multiple 4-element structures from four registers
  • vst4q_u8neon
    Store multiple 4-element structures from four registers
  • vst4q_u16neon
    Store multiple 4-element structures from four registers
  • vst4q_u32neon
    Store multiple 4-element structures from four registers
  • vstrq_p128neon
    Store SIMD&FP register (immediate offset)
  • vsub_f32neon
    Subtract
  • vsub_s8neon
    Subtract
  • vsub_s16neon
    Subtract
  • vsub_s32neon
    Subtract
  • vsub_s64neon
    Subtract
  • vsub_u8neon
    Subtract
  • vsub_u16neon
    Subtract
  • vsub_u32neon
    Subtract
  • vsub_u64neon
    Subtract
  • Subtract returning high narrow
  • Subtract returning high narrow
  • Subtract returning high narrow
  • Subtract returning high narrow
  • Subtract returning high narrow
  • Subtract returning high narrow
  • vsubhn_s16neon
    Subtract returning high narrow
  • vsubhn_s32neon
    Subtract returning high narrow
  • vsubhn_s64neon
    Subtract returning high narrow
  • vsubhn_u16neon
    Subtract returning high narrow
  • vsubhn_u32neon
    Subtract returning high narrow
  • vsubhn_u64neon
    Subtract returning high narrow
  • vsubl_s8neon
    Signed Subtract Long
  • vsubl_s16neon
    Signed Subtract Long
  • vsubl_s32neon
    Signed Subtract Long
  • vsubl_u8neon
    Unsigned Subtract Long
  • vsubl_u16neon
    Unsigned Subtract Long
  • vsubl_u32neon
    Unsigned Subtract Long
  • vsubq_f32neon
    Subtract
  • vsubq_s8neon
    Subtract
  • vsubq_s16neon
    Subtract
  • vsubq_s32neon
    Subtract
  • vsubq_s64neon
    Subtract
  • vsubq_u8neon
    Subtract
  • vsubq_u16neon
    Subtract
  • vsubq_u32neon
    Subtract
  • vsubq_u64neon
    Subtract
  • vsubw_s8neon
    Signed Subtract Wide
  • vsubw_s16neon
    Signed Subtract Wide
  • vsubw_s32neon
    Signed Subtract Wide
  • vsubw_u8neon
    Unsigned Subtract Wide
  • vsubw_u16neon
    Unsigned Subtract Wide
  • vsubw_u32neon
    Unsigned Subtract Wide
  • vtrn_f32neon
    Transpose elements
  • vtrn_p8neon
    Transpose elements
  • vtrn_p16neon
    Transpose elements
  • vtrn_s8neon
    Transpose elements
  • vtrn_s16neon
    Transpose elements
  • vtrn_s32neon
    Transpose elements
  • vtrn_u8neon
    Transpose elements
  • vtrn_u16neon
    Transpose elements
  • vtrn_u32neon
    Transpose elements
  • vtrnq_f32neon
    Transpose elements
  • vtrnq_p8neon
    Transpose elements
  • vtrnq_p16neon
    Transpose elements
  • vtrnq_s8neon
    Transpose elements
  • vtrnq_s16neon
    Transpose elements
  • vtrnq_s32neon
    Transpose elements
  • vtrnq_u8neon
    Transpose elements
  • vtrnq_u16neon
    Transpose elements
  • vtrnq_u32neon
    Transpose elements
  • vtst_p8neon
    Signed compare bitwise Test bits nonzero
  • vtst_p16neon
    Signed compare bitwise Test bits nonzero
  • vtst_s8neon
    Signed compare bitwise Test bits nonzero
  • vtst_s16neon
    Signed compare bitwise Test bits nonzero
  • vtst_s32neon
    Signed compare bitwise Test bits nonzero
  • vtst_u8neon
    Unsigned compare bitwise Test bits nonzero
  • vtst_u16neon
    Unsigned compare bitwise Test bits nonzero
  • vtst_u32neon
    Unsigned compare bitwise Test bits nonzero
  • vtstq_p8neon
    Signed compare bitwise Test bits nonzero
  • vtstq_p16neon
    Signed compare bitwise Test bits nonzero
  • vtstq_s8neon
    Signed compare bitwise Test bits nonzero
  • vtstq_s16neon
    Signed compare bitwise Test bits nonzero
  • vtstq_s32neon
    Signed compare bitwise Test bits nonzero
  • vtstq_u8neon
    Unsigned compare bitwise Test bits nonzero
  • vtstq_u16neon
    Unsigned compare bitwise Test bits nonzero
  • vtstq_u32neon
    Unsigned compare bitwise Test bits nonzero
  • vuzp_f32neon
    Unzip vectors
  • vuzp_p8neon
    Unzip vectors
  • vuzp_p16neon
    Unzip vectors
  • vuzp_s8neon
    Unzip vectors
  • vuzp_s16neon
    Unzip vectors
  • vuzp_s32neon
    Unzip vectors
  • vuzp_u8neon
    Unzip vectors
  • vuzp_u16neon
    Unzip vectors
  • vuzp_u32neon
    Unzip vectors
  • vuzpq_f32neon
    Unzip vectors
  • vuzpq_p8neon
    Unzip vectors
  • vuzpq_p16neon
    Unzip vectors
  • vuzpq_s8neon
    Unzip vectors
  • vuzpq_s16neon
    Unzip vectors
  • vuzpq_s32neon
    Unzip vectors
  • vuzpq_u8neon
    Unzip vectors
  • vuzpq_u16neon
    Unzip vectors
  • vuzpq_u32neon
    Unzip vectors
  • vzip_f32neon
    Zip vectors
  • vzip_p8neon
    Zip vectors
  • vzip_p16neon
    Zip vectors
  • vzip_s8neon
    Zip vectors
  • vzip_s16neon
    Zip vectors
  • vzip_s32neon
    Zip vectors
  • vzip_u8neon
    Zip vectors
  • vzip_u16neon
    Zip vectors
  • vzip_u32neon
    Zip vectors
  • vzipq_f32neon
    Zip vectors
  • vzipq_p8neon
    Zip vectors
  • vzipq_p16neon
    Zip vectors
  • vzipq_s8neon
    Zip vectors
  • vzipq_s16neon
    Zip vectors
  • vzipq_s32neon
    Zip vectors
  • vzipq_u8neon
    Zip vectors
  • vzipq_u16neon
    Zip vectors
  • vzipq_u32neon
    Zip vectors