Function core::arch::riscv32::sinval_vma
source · 🔬This is a nightly-only experimental API. (
stdsimd
#48556)Available on RISC-V RV32 only.
Expand description
Invalidate supervisor translation cache for given virtual address and address space
This instruction invalidates any address-translation cache entries that an
SFENCE.VMA
instruction with the same values of vaddr
and asid
would invalidate.